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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-06 16:00:58 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-06 16:00:58 +0000 |
commit | ef5bba01366adf93e702981e49a0858137c04b58 (patch) | |
tree | dfd945a8ce55968a0e1f4901d479cf63e99b9c99 /llvm | |
parent | 0670ad14f87fafbe1b8b6fd2d5b12f3d01285ee7 (diff) | |
download | bcm5719-llvm-ef5bba01366adf93e702981e49a0858137c04b58.tar.gz bcm5719-llvm-ef5bba01366adf93e702981e49a0858137c04b58.zip |
BranchRelaxation: Account for function alignment
llvm-svn: 283462
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/lib/CodeGen/BranchRelaxation.cpp | 27 | ||||
-rw-r--r-- | llvm/test/CodeGen/AArch64/branch-relax-alignment.ll | 29 |
2 files changed, 47 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/BranchRelaxation.cpp b/llvm/lib/CodeGen/BranchRelaxation.cpp index f1383064b79..4f0dfaf874f 100644 --- a/llvm/lib/CodeGen/BranchRelaxation.cpp +++ b/llvm/lib/CodeGen/BranchRelaxation.cpp @@ -46,13 +46,22 @@ class BranchRelaxation : public MachineFunctionPass { BasicBlockInfo() : Offset(0), Size(0) {} - /// Compute the offset immediately following this block. If LogAlign is - /// specified, return the offset the successor block will get if it has - /// this alignment. - unsigned postOffset(unsigned LogAlign = 0) const { + /// Compute the offset immediately following this block. \p MBB is the next + /// block. + unsigned postOffset(const MachineBasicBlock &MBB) const { unsigned PO = Offset + Size; - unsigned Align = 1 << LogAlign; - return (PO + Align - 1) / Align * Align; + unsigned Align = MBB.getAlignment(); + if (Align == 0) + return PO; + + unsigned AlignAmt = 1 << Align; + unsigned ParentAlign = MBB.getParent()->getAlignment(); + if (Align <= ParentAlign) + return PO + OffsetToAlignment(PO, AlignAmt); + + // The alignment of this MBB is larger than the function's alignment, so we + // can't tell whether or not it will insert nops. Assume that it will. + return PO + AlignAmt + OffsetToAlignment(PO, AlignAmt); } }; @@ -99,7 +108,7 @@ void BranchRelaxation::verify() { unsigned Align = MBB.getAlignment(); unsigned Num = MBB.getNumber(); assert(BlockInfo[Num].Offset % (1u << Align) == 0); - assert(!Num || BlockInfo[PrevNum].postOffset() <= BlockInfo[Num].Offset); + assert(!Num || BlockInfo[PrevNum].postOffset(MBB) <= BlockInfo[Num].Offset); PrevNum = Num; } #endif @@ -167,8 +176,8 @@ void BranchRelaxation::adjustBlockOffsets(MachineBasicBlock &Start) { continue; // Get the offset and known bits at the end of the layout predecessor. // Include the alignment of the current block. - unsigned LogAlign = MBB.getAlignment(); - BlockInfo[Num].Offset = BlockInfo[PrevNum].postOffset(LogAlign); + BlockInfo[Num].Offset = BlockInfo[PrevNum].postOffset(MBB); + PrevNum = Num; } } diff --git a/llvm/test/CodeGen/AArch64/branch-relax-alignment.ll b/llvm/test/CodeGen/AArch64/branch-relax-alignment.ll new file mode 100644 index 00000000000..d82afc11a46 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/branch-relax-alignment.ll @@ -0,0 +1,29 @@ +; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-bcc-offset-bits=4 -align-all-nofallthru-blocks=4 < %s | FileCheck %s + +; Long branch is assumed because the block has a higher alignment +; requirement than the function. + +; CHECK-LABEL: invert_bcc_block_align_higher_func: +; CHECK: b.eq [[JUMP_BB1:LBB[0-9]+_[0-9]+]] +; CHECK-NEXT: b [[JUMP_BB2:LBB[0-9]+_[0-9]+]] + +; CHECK: [[JUMP_BB1]]: +; CHECK: ret +; CHECK: .p2align 4 + +; CHECK: [[JUMP_BB2]]: +; CHECK: ret +define i32 @invert_bcc_block_align_higher_func(i32 %x, i32 %y) align 4 #0 { + %1 = icmp eq i32 %x, %y + br i1 %1, label %bb1, label %bb2 + +bb2: + store volatile i32 9, i32* undef + ret i32 1 + +bb1: + store volatile i32 42, i32* undef + ret i32 0 +} + +attributes #0 = { nounwind }
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