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| author | Chris Lattner <sabre@nondot.org> | 2010-09-29 02:24:57 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-09-29 02:24:57 +0000 |
| commit | ef1c2fc30564a713f7ddacbdce968b7710a94b63 (patch) | |
| tree | 4a2eacfe16b55f640df38facaf7909f0ed6b4980 /llvm | |
| parent | 6d01ad92c76fe49c9ee1ca50013c3d0205cd4d6d (diff) | |
| download | bcm5719-llvm-ef1c2fc30564a713f7ddacbdce968b7710a94b63.tar.gz bcm5719-llvm-ef1c2fc30564a713f7ddacbdce968b7710a94b63.zip | |
implement rdar://8456382 - cvtsd2si support, by removing some Int_ prefixes.
llvm-svn: 115017
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 10 | ||||
| -rw-r--r-- | llvm/test/MC/AsmParser/X86/x86_instructions.s | 10 |
3 files changed, 16 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index b354de2eb82..70c4002b95f 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -360,8 +360,8 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) { X86::Int_CVTPD2PSrr, X86::Int_CVTPD2PSrm, 16 }, { X86::Int_CVTPS2DQrr, X86::Int_CVTPS2DQrm, 16 }, { X86::Int_CVTPS2PDrr, X86::Int_CVTPS2PDrm, 0 }, - { X86::Int_CVTSD2SI64rr,X86::Int_CVTSD2SI64rm, 0 }, - { X86::Int_CVTSD2SIrr, X86::Int_CVTSD2SIrm, 0 }, + { X86::CVTSD2SI64rr, X86::CVTSD2SI64rm, 0 }, + { X86::CVTSD2SIrr, X86::CVTSD2SIrm, 0 }, { X86::Int_CVTSD2SSrr, X86::Int_CVTSD2SSrm, 0 }, { X86::Int_CVTSI2SD64rr,X86::Int_CVTSI2SD64rm, 0 }, { X86::Int_CVTSI2SDrr, X86::Int_CVTSI2SDrm, 0 }, diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index c1926c3dd89..c1bf332a698 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -651,13 +651,11 @@ defm Int_CVTSS2SI : sse12_cvt_sint<0x2D, VR128, GR32, int_x86_sse_cvtss2si, f32mem, load, "cvtss2si">, XS; defm Int_CVTSS2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, int_x86_sse_cvtss2si64, f32mem, load, "cvtss2si{q}">, XS, REX_W; -defm Int_CVTSD2SI : sse12_cvt_sint<0x2D, VR128, GR32, int_x86_sse2_cvtsd2si, - f128mem, load, "cvtsd2si">, XD; -defm Int_CVTSD2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, int_x86_sse2_cvtsd2si64, - f128mem, load, "cvtsd2si">, XD, REX_W; +defm CVTSD2SI : sse12_cvt_sint<0x2D, VR128, GR32, int_x86_sse2_cvtsd2si, + f128mem, load, "cvtsd2si">, XD; +defm CVTSD2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, int_x86_sse2_cvtsd2si64, + f128mem, load, "cvtsd2si">, XD, REX_W; -defm CVTSD2SI64 : sse12_cvt_s_np<0x2D, VR128, GR64, f64mem, "cvtsd2si{q}">, XD, - REX_W; let isAsmParserOnly = 1 in { defm Int_VCVTSI2SS : sse12_cvt_sint_3addr<0x2A, GR32, VR128, diff --git a/llvm/test/MC/AsmParser/X86/x86_instructions.s b/llvm/test/MC/AsmParser/X86/x86_instructions.s index bf33ea37422..cff56cc31ea 100644 --- a/llvm/test/MC/AsmParser/X86/x86_instructions.s +++ b/llvm/test/MC/AsmParser/X86/x86_instructions.s @@ -415,3 +415,13 @@ fstsw %ax fstsw (%rax) // CHECK: wait // CHECK: fnstsw (%rax) + + +// rdar://8456382 - cvtsd2si support. +cvtsd2si %xmm1, %rax +// CHECK: cvtsd2si %xmm1, %rax +// CHECK: encoding: [0xf2,0x48,0x0f,0x2d,0xc1] +cvtsd2si %xmm1, %eax +// CHECK: cvtsd2si %xmm1, %eax +// CHECK: encoding: [0xf2,0x0f,0x2d,0xc1] + |
