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| author | Jun Bum Lim <junbuml@codeaurora.org> | 2016-08-22 18:21:56 +0000 |
|---|---|---|
| committer | Jun Bum Lim <junbuml@codeaurora.org> | 2016-08-22 18:21:56 +0000 |
| commit | ec8b8cc5954ac0c7c0ce0a4074cf87488431b980 (patch) | |
| tree | bb04a4cfab65aca787b542a92962881e739fbb4e /llvm | |
| parent | 475f4a763f9a051f5769099dcf49ac858d4c6272 (diff) | |
| download | bcm5719-llvm-ec8b8cc5954ac0c7c0ce0a4074cf87488431b980.tar.gz bcm5719-llvm-ec8b8cc5954ac0c7c0ce0a4074cf87488431b980.zip | |
[InstCombine] Allow sinking from unique predecessor with multiple edges
Summary: We can allow sinking if the single user block has only one unique predecessor, regardless of the number of edges. Note that a switch statement with multiple cases can have the same destination.
Reviewers: mcrosier, majnemer, spatel, reames
Subscribers: reames, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D23722
llvm-svn: 279448
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/sink_instruction.ll | 23 |
2 files changed, 24 insertions, 1 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp index 6424e083bd1..12c42ce6472 100644 --- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp @@ -2903,7 +2903,7 @@ bool InstCombiner::run() { // If the user is one of our immediate successors, and if that successor // only has us as a predecessors (we'd have to split the critical edge // otherwise), we can keep going. - if (UserIsSuccessor && UserParent->getSinglePredecessor()) { + if (UserIsSuccessor && UserParent->getUniquePredecessor()) { // Okay, the CFG is simple enough, try to sink this instruction. if (TryToSinkInstruction(I, UserParent)) { DEBUG(dbgs() << "IC: Sink: " << *I << '\n'); diff --git a/llvm/test/Transforms/InstCombine/sink_instruction.ll b/llvm/test/Transforms/InstCombine/sink_instruction.ll index 1bbd6b76384..4c057c66f7f 100644 --- a/llvm/test/Transforms/InstCombine/sink_instruction.ll +++ b/llvm/test/Transforms/InstCombine/sink_instruction.ll @@ -54,3 +54,26 @@ bb4: ; preds = %bb2 } declare i32 @bar() + +define i32 @test3(i32* nocapture readonly %P, i32 %i) { +entry: + %idxprom = sext i32 %i to i64 + %arrayidx = getelementptr inbounds i32, i32* %P, i64 %idxprom + %0 = load i32, i32* %arrayidx, align 4 + switch i32 %i, label %sw.epilog [ + i32 5, label %sw.bb + i32 2, label %sw.bb + ] + +sw.bb: ; preds = %entry, %entry +; CHECK-LABEL: sw.bb: +; CHECK: %idxprom = sext i32 %i to i64 +; CHECK: %arrayidx = getelementptr inbounds i32, i32* %P, i64 %idxprom +; CHECK: %0 = load i32, i32* %arrayidx, align 4 + %add = add nsw i32 %0, %i + br label %sw.epilog + +sw.epilog: ; preds = %entry, %sw.bb + %sum.0 = phi i32 [ %add, %sw.bb ], [ 0, %entry ] + ret i32 %sum.0 +} |

