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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-06-21 13:45:33 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-06-21 13:45:33 +0000 |
| commit | e74e08fe61c9c11bde11ebe7ffc8fde697b967e0 (patch) | |
| tree | 1e517fd929969efdb7da05ab91c1c080dc5959a8 /llvm | |
| parent | 98aab7c6fc029ea30a682bea58eac35c07b41718 (diff) | |
| download | bcm5719-llvm-e74e08fe61c9c11bde11ebe7ffc8fde697b967e0.tar.gz bcm5719-llvm-e74e08fe61c9c11bde11ebe7ffc8fde697b967e0.zip | |
[X86][SSE] Dropped -mcpu from vector blend shuffle tests and regenerate
Use triple and attribute only for consistency
llvm-svn: 305909
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-blend.ll | 74 |
1 files changed, 20 insertions, 54 deletions
diff --git a/llvm/test/CodeGen/X86/vector-blend.ll b/llvm/test/CodeGen/X86/vector-blend.ll index f0a5fe1dbff..ab5fac59ebd 100644 --- a/llvm/test/CodeGen/X86/vector-blend.ll +++ b/llvm/test/CodeGen/X86/vector-blend.ll @@ -1,9 +1,9 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=SSE2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=SSSE3 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 ; AVX128 tests: @@ -904,26 +904,12 @@ entry: } define <4 x i32> @blend_neg_logic_v4i32(<4 x i32> %a, <4 x i32> %b) { -; SSE2-LABEL: blend_neg_logic_v4i32: -; SSE2: # BB#0: # %entry -; SSE2-NEXT: psrad $31, %xmm1 -; SSE2-NEXT: pxor %xmm1, %xmm0 -; SSE2-NEXT: psubd %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSSE3-LABEL: blend_neg_logic_v4i32: -; SSSE3: # BB#0: # %entry -; SSSE3-NEXT: psrad $31, %xmm1 -; SSSE3-NEXT: pxor %xmm1, %xmm0 -; SSSE3-NEXT: psubd %xmm1, %xmm0 -; SSSE3-NEXT: retq -; -; SSE41-LABEL: blend_neg_logic_v4i32: -; SSE41: # BB#0: # %entry -; SSE41-NEXT: psrad $31, %xmm1 -; SSE41-NEXT: pxor %xmm1, %xmm0 -; SSE41-NEXT: psubd %xmm1, %xmm0 -; SSE41-NEXT: retq +; SSE-LABEL: blend_neg_logic_v4i32: +; SSE: # BB#0: # %entry +; SSE-NEXT: psrad $31, %xmm1 +; SSE-NEXT: pxor %xmm1, %xmm0 +; SSE-NEXT: psubd %xmm1, %xmm0 +; SSE-NEXT: retq ; ; AVX-LABEL: blend_neg_logic_v4i32: ; AVX: # BB#0: # %entry @@ -942,35 +928,15 @@ entry: } define <8 x i32> @blend_neg_logic_v8i32(<8 x i32> %a, <8 x i32> %b) { -; SSE2-LABEL: blend_neg_logic_v8i32: -; SSE2: # BB#0: # %entry -; SSE2-NEXT: psrad $31, %xmm3 -; SSE2-NEXT: psrad $31, %xmm2 -; SSE2-NEXT: pxor %xmm2, %xmm0 -; SSE2-NEXT: psubd %xmm2, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm1 -; SSE2-NEXT: psubd %xmm3, %xmm1 -; SSE2-NEXT: retq -; -; SSSE3-LABEL: blend_neg_logic_v8i32: -; SSSE3: # BB#0: # %entry -; SSSE3-NEXT: psrad $31, %xmm3 -; SSSE3-NEXT: psrad $31, %xmm2 -; SSSE3-NEXT: pxor %xmm2, %xmm0 -; SSSE3-NEXT: psubd %xmm2, %xmm0 -; SSSE3-NEXT: pxor %xmm3, %xmm1 -; SSSE3-NEXT: psubd %xmm3, %xmm1 -; SSSE3-NEXT: retq -; -; SSE41-LABEL: blend_neg_logic_v8i32: -; SSE41: # BB#0: # %entry -; SSE41-NEXT: psrad $31, %xmm3 -; SSE41-NEXT: psrad $31, %xmm2 -; SSE41-NEXT: pxor %xmm2, %xmm0 -; SSE41-NEXT: psubd %xmm2, %xmm0 -; SSE41-NEXT: pxor %xmm3, %xmm1 -; SSE41-NEXT: psubd %xmm3, %xmm1 -; SSE41-NEXT: retq +; SSE-LABEL: blend_neg_logic_v8i32: +; SSE: # BB#0: # %entry +; SSE-NEXT: psrad $31, %xmm3 +; SSE-NEXT: psrad $31, %xmm2 +; SSE-NEXT: pxor %xmm2, %xmm0 +; SSE-NEXT: psubd %xmm2, %xmm0 +; SSE-NEXT: pxor %xmm3, %xmm1 +; SSE-NEXT: psubd %xmm3, %xmm1 +; SSE-NEXT: retq ; ; AVX1-LABEL: blend_neg_logic_v8i32: ; AVX1: # BB#0: # %entry |
