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authorJim Grosbach <grosbach@apple.com>2011-03-10 19:27:17 +0000
committerJim Grosbach <grosbach@apple.com>2011-03-10 19:27:17 +0000
commite5ccac85d302ea158a64cc598abf17e72331b30b (patch)
tree69f910dbeeb41d00e3e046f32e5de33cd0ff811a /llvm
parentb75c0db9d29d265bbb304c20ff163daa360414d5 (diff)
downloadbcm5719-llvm-e5ccac85d302ea158a64cc598abf17e72331b30b.tar.gz
bcm5719-llvm-e5ccac85d302ea158a64cc598abf17e72331b30b.zip
DMB can just be a pat referencing MCR.
llvm-svn: 127423
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td13
1 files changed, 6 insertions, 7 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index c28554baf62..6aad275086f 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -3250,13 +3250,6 @@ def DMB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
let Inst{31-4} = 0xf57ff05;
let Inst{3-0} = opt;
}
-
-def DMB_MCR : AInoP<(outs), (ins GPR:$zero), MiscFrm, NoItinerary,
- "mcr", "\tp15, 0, $zero, c7, c10, 5",
- [(ARMMemBarrierMCR GPR:$zero)]>,
- Requires<[IsARM, HasV6]> {
- // FIXME: add encoding
-}
}
def DSB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
@@ -3915,6 +3908,12 @@ def : ARMV5TEPat<(add GPR:$acc,
(sra (mul GPR:$a, sext_16_node:$b), (i32 16))),
(SMLAWB GPR:$a, GPR:$b, GPR:$acc)>;
+
+// Pre-v7 uses MCR for synchronization barriers.
+def : ARMPat<(ARMMemBarrierMCR GPR:$zero), (MCR 15, 0, GPR:$zero, 7, 10, 5)>,
+ Requires<[IsARM, HasV6]>;
+
+
//===----------------------------------------------------------------------===//
// Thumb Support
//
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