[RISCV] Fix RISCVTTIImpl::getIntImmCost for immediates where getMinSignedBits() > 64

APInt::getSExtValue will assert if getMinSignedBits() > 64. This can happen,
for instance, if examining an i128. Avoid this assertion by checking
Imm.getMinSignedBits() <= 64 before doing
getTLI()->isLegalAddImmediate(Imm.getSExtValue()). We could directly check
getMinSignedBits() <= 12 but it seems better to reuse the isLegalAddImmediate
helper for this.

Differential Revision: https://reviews.llvm.org/D64390

llvm-svn: 365462

2 files changed, 13 insertions, 2 deletions

diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 41a2b5c1f20..2c6400cbb1e 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -71,8 +71,10 @@ int RISCVTTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
     // Check immediate is the correct argument...
     if (Instruction::isCommutative(Opcode) || Idx == ImmArgIdx) {
       // ... and fits into the 12-bit immediate.
-      if (getTLI()->isLegalAddImmediate(Imm.getSExtValue()))
+      if (Imm.getMinSignedBits() <= 64 &&
+          getTLI()->isLegalAddImmediate(Imm.getSExtValue())) {
         return TTI::TCC_Free;
+      }
     }
 
     // Otherwise, use the full materialisation cost.
diff --git a/llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll b/llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
index 689e10e70ff..15b04f771db 100644
--- a/llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
+++ b/llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
@@ -26,4 +26,13 @@ define i64 @test3(i64 %a) nounwind {
   %1 = mul i64 %a, 32767
   %2 = add i64 %1, 32767
   ret i64 %2
-}
\ No newline at end of file
+}
+
+; Check that we hoist immediates with very large values.
+define i128 @test4(i128 %a) nounwind {
+; CHECK-LABEL: test4
+; CHECK: %const = bitcast i128 12297829382473034410122878 to i128
+  %1 = add i128 %a, 12297829382473034410122878
+  %2 = add i128 %1, 12297829382473034410122878
+  ret i128 %2
+}