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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-25 19:39:06 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-25 19:39:06 +0000 |
| commit | e047b2598e3a63bf9e2dd4e8cbed0d0c8dcd7903 (patch) | |
| tree | 3b288e675c25c3752813a6aef24def8120cff1f7 /llvm | |
| parent | df3e2246323c7e9c116fd38cd77df6d2a3b96c16 (diff) | |
| download | bcm5719-llvm-e047b2598e3a63bf9e2dd4e8cbed0d0c8dcd7903.tar.gz bcm5719-llvm-e047b2598e3a63bf9e2dd4e8cbed0d0c8dcd7903.zip | |
AMDGPU: Fix missing verify-machineinstrs in control flow test
llvm-svn: 276679
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/branch-uniformity.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/branch-uniformity.ll b/llvm/test/CodeGen/AMDGPU/branch-uniformity.ll index d1a1f93f021..b3779e8dd42 100644 --- a/llvm/test/CodeGen/AMDGPU/branch-uniformity.ll +++ b/llvm/test/CodeGen/AMDGPU/branch-uniformity.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=amdgcn-- < %s | FileCheck %s +; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck %s ; The branch instruction in LOOP49 has a uniform condition, but PHI instructions ; introduced by the structurizecfg pass previously caused a false divergence |
