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authorJF Bastien <jfbastien@apple.com>2019-07-25 16:11:57 +0000
committerJF Bastien <jfbastien@apple.com>2019-07-25 16:11:57 +0000
commitdbc0a5df8d5f4fb826325b4f169acb5c26250c87 (patch)
treea878ee10aaf8b7dd71338eee927006dbc251dc44 /llvm
parenteb3c1ca896fa858f421c6247d1a5a30edad9535f (diff)
downloadbcm5719-llvm-dbc0a5df8d5f4fb826325b4f169acb5c26250c87.tar.gz
bcm5719-llvm-dbc0a5df8d5f4fb826325b4f169acb5c26250c87.zip
Allow prefetching from non-zero address spaces
Summary: This is useful for targets which have prefetch instructions for non-default address spaces. <rdar://problem/42662136> Subscribers: nemanjai, javed.absar, hiraditya, kbarton, jkorous, dexonsmith, cfe-commits, llvm-commits, RKSimon, hfinkel, t.p.northover, craig.topper, anemet Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D65254 llvm-svn: 367032
Diffstat (limited to 'llvm')
-rw-r--r--llvm/include/llvm/IR/Intrinsics.td2
-rw-r--r--llvm/lib/IR/AutoUpgrade.cpp13
-rw-r--r--llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp4
-rw-r--r--llvm/test/Assembler/auto_upgrade_intrinsics.ll15
-rw-r--r--llvm/test/Bitcode/compatibility-3.6.ll2
-rw-r--r--llvm/test/Bitcode/compatibility-3.7.ll2
-rw-r--r--llvm/test/Bitcode/compatibility-3.8.ll2
-rw-r--r--llvm/test/Bitcode/compatibility-3.9.ll8
-rw-r--r--llvm/test/Bitcode/compatibility-4.0.ll8
-rw-r--r--llvm/test/Bitcode/compatibility-5.0.ll12
-rw-r--r--llvm/test/Bitcode/compatibility-6.0.ll12
-rw-r--r--llvm/test/Bitcode/compatibility.ll6
-rw-r--r--llvm/test/Verifier/intrinsic-immarg.ll2
13 files changed, 58 insertions, 30 deletions
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index d6489847868..e3c13dad14c 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -451,7 +451,7 @@ def int_thread_pointer : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>,
// from being reordered overly much with respect to nearby access to the same
// memory while not impeding optimization.
def int_prefetch
- : Intrinsic<[], [ llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty ],
+ : Intrinsic<[], [ llvm_anyptr_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty ],
[ IntrInaccessibleMemOrArgMemOnly, ReadOnly<0>, NoCapture<0>,
ImmArg<1>, ImmArg<2>]>;
def int_pcmarker : Intrinsic<[], [llvm_i32_ty]>;
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index a2d82035282..0800fcffcd2 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -789,6 +789,19 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
}
break;
+ case 'p':
+ if (Name == "prefetch") {
+ // Handle address space overloading.
+ Type *Tys[] = {F->arg_begin()->getType()};
+ if (F->getName() != Intrinsic::getName(Intrinsic::prefetch, Tys)) {
+ rename(F);
+ NewFn =
+ Intrinsic::getDeclaration(F->getParent(), Intrinsic::prefetch, Tys);
+ return true;
+ }
+ }
+ break;
+
case 's':
if (Name == "stackprotectorcheck") {
NewFn = nullptr;
diff --git a/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp b/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
index 1fcf1315a17..a972d6fa2fc 100644
--- a/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
@@ -312,8 +312,8 @@ bool LoopDataPrefetch::runOnLoop(Loop *L) {
IRBuilder<> Builder(MemI);
Module *M = BB->getParent()->getParent();
Type *I32 = Type::getInt32Ty(BB->getContext());
- Function *PrefetchFunc =
- Intrinsic::getDeclaration(M, Intrinsic::prefetch);
+ Function *PrefetchFunc = Intrinsic::getDeclaration(
+ M, Intrinsic::prefetch, PrefPtrValue->getType());
Builder.CreateCall(
PrefetchFunc,
{PrefPtrValue,
diff --git a/llvm/test/Assembler/auto_upgrade_intrinsics.ll b/llvm/test/Assembler/auto_upgrade_intrinsics.ll
index 9ca4c4855e7..f75206d61e0 100644
--- a/llvm/test/Assembler/auto_upgrade_intrinsics.ll
+++ b/llvm/test/Assembler/auto_upgrade_intrinsics.ll
@@ -140,6 +140,21 @@ define void @tests.lifetime.start.end() {
ret void
}
+declare void @llvm.prefetch(i8*, i32, i32, i32)
+define void @test.prefetch(i8* %ptr) {
+; CHECK-LABEL: @test.prefetch(
+; CHECK: @llvm.prefetch.p0i8(i8* %ptr, i32 0, i32 3, i32 2)
+ call void @llvm.prefetch(i8* %ptr, i32 0, i32 3, i32 2)
+ ret void
+}
+
+declare void @llvm.prefetch.p0i8(i8*, i32, i32, i32)
+define void @test.prefetch.2(i8* %ptr) {
+; CHECK-LABEL: @test.prefetch.2(
+; CHECK: @llvm.prefetch.p0i8(i8* %ptr, i32 0, i32 3, i32 2)
+ call void @llvm.prefetch(i8* %ptr, i32 0, i32 3, i32 2)
+ ret void
+}
; This is part of @test.objectsize(), since llvm.objectsize declaration gets
; emitted at the end.
diff --git a/llvm/test/Bitcode/compatibility-3.6.ll b/llvm/test/Bitcode/compatibility-3.6.ll
index e1481a2c456..3f40733db80 100644
--- a/llvm/test/Bitcode/compatibility-3.6.ll
+++ b/llvm/test/Bitcode/compatibility-3.6.ll
@@ -1133,7 +1133,7 @@ define void @intrinsics.codegen() {
; CHECK: call void @llvm.stackrestore(i8* %stack)
call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
- ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
+ ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0)
call void @llvm.pcmarker(i32 1)
; CHECK: call void @llvm.pcmarker(i32 1)
diff --git a/llvm/test/Bitcode/compatibility-3.7.ll b/llvm/test/Bitcode/compatibility-3.7.ll
index 58fa6e12d13..867e0fdc605 100644
--- a/llvm/test/Bitcode/compatibility-3.7.ll
+++ b/llvm/test/Bitcode/compatibility-3.7.ll
@@ -1164,7 +1164,7 @@ define void @intrinsics.codegen() {
; CHECK: call void @llvm.stackrestore(i8* %stack)
call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
- ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
+ ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0)
call void @llvm.pcmarker(i32 1)
; CHECK: call void @llvm.pcmarker(i32 1)
diff --git a/llvm/test/Bitcode/compatibility-3.8.ll b/llvm/test/Bitcode/compatibility-3.8.ll
index e96180681d6..7fe0bf6aa5e 100644
--- a/llvm/test/Bitcode/compatibility-3.8.ll
+++ b/llvm/test/Bitcode/compatibility-3.8.ll
@@ -1319,7 +1319,7 @@ define void @intrinsics.codegen() {
; CHECK: call void @llvm.stackrestore(i8* %stack)
call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
- ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
+ ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0)
call void @llvm.pcmarker(i32 1)
; CHECK: call void @llvm.pcmarker(i32 1)
diff --git a/llvm/test/Bitcode/compatibility-3.9.ll b/llvm/test/Bitcode/compatibility-3.9.ll
index d715d54ba46..f23b1066ea1 100644
--- a/llvm/test/Bitcode/compatibility-3.9.ll
+++ b/llvm/test/Bitcode/compatibility-3.9.ll
@@ -1390,7 +1390,7 @@ define void @intrinsics.codegen() {
; CHECK: call void @llvm.stackrestore(i8* %stack)
call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
- ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
+ ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0)
call void @llvm.pcmarker(i32 1)
; CHECK: call void @llvm.pcmarker(i32 1)
@@ -1588,7 +1588,7 @@ normal:
}
declare void @f.writeonly() writeonly
-; CHECK: declare void @f.writeonly() #40
+; CHECK: declare void @f.writeonly() #39
; CHECK: attributes #0 = { alignstack=4 }
; CHECK: attributes #1 = { alignstack=8 }
@@ -1629,8 +1629,8 @@ declare void @f.writeonly() writeonly
; CHECK: attributes #36 = { argmemonly nounwind readonly }
; CHECK: attributes #37 = { argmemonly nounwind }
; CHECK: attributes #38 = { nounwind readonly }
-; CHECK: attributes #39 = { inaccessiblemem_or_argmemonly nounwind }
-; CHECK: attributes #40 = { writeonly }
+; CHECK: attributes #39 = { writeonly }
+; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nounwind }
; CHECK: attributes #41 = { builtin }
;; Metadata
diff --git a/llvm/test/Bitcode/compatibility-4.0.ll b/llvm/test/Bitcode/compatibility-4.0.ll
index a49e64e958f..8963ba60e6c 100644
--- a/llvm/test/Bitcode/compatibility-4.0.ll
+++ b/llvm/test/Bitcode/compatibility-4.0.ll
@@ -1390,7 +1390,7 @@ define void @intrinsics.codegen() {
; CHECK: call void @llvm.stackrestore(i8* %stack)
call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
- ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
+ ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0)
call void @llvm.pcmarker(i32 1)
; CHECK: call void @llvm.pcmarker(i32 1)
@@ -1606,7 +1606,7 @@ normal:
declare void @f.writeonly() writeonly
-; CHECK: declare void @f.writeonly() #40
+; CHECK: declare void @f.writeonly() #39
;; Constant Expressions
@@ -1654,8 +1654,8 @@ define i8** @constexpr() {
; CHECK: attributes #36 = { argmemonly nounwind readonly }
; CHECK: attributes #37 = { argmemonly nounwind }
; CHECK: attributes #38 = { nounwind readonly }
-; CHECK: attributes #39 = { inaccessiblemem_or_argmemonly nounwind }
-; CHECK: attributes #40 = { writeonly }
+; CHECK: attributes #39 = { writeonly }
+; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nounwind }
; CHECK: attributes #41 = { builtin }
;; Metadata
diff --git a/llvm/test/Bitcode/compatibility-5.0.ll b/llvm/test/Bitcode/compatibility-5.0.ll
index 420d3139f56..d20d45e6495 100644
--- a/llvm/test/Bitcode/compatibility-5.0.ll
+++ b/llvm/test/Bitcode/compatibility-5.0.ll
@@ -1400,7 +1400,7 @@ define void @intrinsics.codegen() {
; CHECK: call void @llvm.stackrestore(i8* %stack)
call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
- ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
+ ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0)
call void @llvm.pcmarker(i32 1)
; CHECK: call void @llvm.pcmarker(i32 1)
@@ -1616,10 +1616,10 @@ normal:
declare void @f.writeonly() writeonly
-; CHECK: declare void @f.writeonly() #40
+; CHECK: declare void @f.writeonly() #39
declare void @f.speculatable() speculatable
-; CHECK: declare void @f.speculatable() #41
+; CHECK: declare void @f.speculatable() #40
;; Constant Expressions
@@ -1667,9 +1667,9 @@ define i8** @constexpr() {
; CHECK: attributes #36 = { argmemonly nounwind readonly }
; CHECK: attributes #37 = { argmemonly nounwind }
; CHECK: attributes #38 = { nounwind readonly }
-; CHECK: attributes #39 = { inaccessiblemem_or_argmemonly nounwind }
-; CHECK: attributes #40 = { writeonly }
-; CHECK: attributes #41 = { speculatable }
+; CHECK: attributes #39 = { writeonly }
+; CHECK: attributes #40 = { speculatable }
+; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nounwind }
; CHECK: attributes #42 = { builtin }
; CHECK: attributes #43 = { strictfp }
diff --git a/llvm/test/Bitcode/compatibility-6.0.ll b/llvm/test/Bitcode/compatibility-6.0.ll
index 3cc00e21a59..35adeaaa6a4 100644
--- a/llvm/test/Bitcode/compatibility-6.0.ll
+++ b/llvm/test/Bitcode/compatibility-6.0.ll
@@ -1411,7 +1411,7 @@ define void @intrinsics.codegen() {
; CHECK: call void @llvm.stackrestore(i8* %stack)
call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
- ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
+ ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0)
call void @llvm.pcmarker(i32 1)
; CHECK: call void @llvm.pcmarker(i32 1)
@@ -1627,10 +1627,10 @@ normal:
declare void @f.writeonly() writeonly
-; CHECK: declare void @f.writeonly() #40
+; CHECK: declare void @f.writeonly() #39
declare void @f.speculatable() speculatable
-; CHECK: declare void @f.speculatable() #41
+; CHECK: declare void @f.speculatable() #40
;; Constant Expressions
@@ -1678,9 +1678,9 @@ define i8** @constexpr() {
; CHECK: attributes #36 = { argmemonly nounwind readonly }
; CHECK: attributes #37 = { argmemonly nounwind }
; CHECK: attributes #38 = { nounwind readonly }
-; CHECK: attributes #39 = { inaccessiblemem_or_argmemonly nounwind }
-; CHECK: attributes #40 = { writeonly }
-; CHECK: attributes #41 = { speculatable }
+; CHECK: attributes #39 = { writeonly }
+; CHECK: attributes #40 = { speculatable }
+; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nounwind }
; CHECK: attributes #42 = { builtin }
; CHECK: attributes #43 = { strictfp }
diff --git a/llvm/test/Bitcode/compatibility.ll b/llvm/test/Bitcode/compatibility.ll
index 14cae7ffe90..2d26134211a 100644
--- a/llvm/test/Bitcode/compatibility.ll
+++ b/llvm/test/Bitcode/compatibility.ll
@@ -1475,7 +1475,7 @@ declare void @llvm.write_register.i32(metadata, i32)
declare void @llvm.write_register.i64(metadata, i64)
declare i8* @llvm.stacksave()
declare void @llvm.stackrestore(i8*)
-declare void @llvm.prefetch(i8*, i32, i32, i32)
+declare void @llvm.prefetch.p0i8(i8*, i32, i32, i32)
declare void @llvm.pcmarker(i32)
declare i64 @llvm.readcyclecounter()
declare void @llvm.clear_cache(i8*, i8*)
@@ -1502,8 +1502,8 @@ define void @intrinsics.codegen() {
call void @llvm.stackrestore(i8* %stack)
; CHECK: call void @llvm.stackrestore(i8* %stack)
- call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
- ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0)
+ call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0)
+ ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0)
call void @llvm.pcmarker(i32 1)
; CHECK: call void @llvm.pcmarker(i32 1)
diff --git a/llvm/test/Verifier/intrinsic-immarg.ll b/llvm/test/Verifier/intrinsic-immarg.ll
index 53812aee934..9a5df67a564 100644
--- a/llvm/test/Verifier/intrinsic-immarg.ll
+++ b/llvm/test/Verifier/intrinsic-immarg.ll
@@ -159,7 +159,7 @@ declare void @llvm.prefetch(i8*, i32, i32, i32)
define void @test_prefetch(i8* %ptr, i32 %arg0, i32 %arg1) {
; CHECK: immarg operand has non-immediate parameter
; CHECK-NEXT: i32 %arg0
- ; CHECK-NEXT: call void @llvm.prefetch(i8* %ptr, i32 %arg0, i32 0, i32 0)
+ ; CHECK-NEXT: call void @llvm.prefetch.p0i8(i8* %ptr, i32 %arg0, i32 0, i32 0)
; CHECK: immarg operand has non-immediate parameter
; CHECK-NEXT: i32 %arg1
call void @llvm.prefetch(i8* %ptr, i32 %arg0, i32 0, i32 0)
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