diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2014-12-15 22:45:48 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2014-12-15 22:45:48 +0000 |
| commit | dad56868819e04c1cf4de361d0f9811d4f41559a (patch) | |
| tree | a0f90ab524796ea7224671d8d261f8214b4a465e /llvm | |
| parent | 388b8794c9cc83dcad29b34a751405eb4f5371d3 (diff) | |
| download | bcm5719-llvm-dad56868819e04c1cf4de361d0f9811d4f41559a.tar.gz bcm5719-llvm-dad56868819e04c1cf4de361d0f9811d4f41559a.zip | |
Added missing tests for X86vzmovl folding. NFC.
llvm-svn: 224284
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-zmov.ll | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vector-zmov.ll b/llvm/test/CodeGen/X86/vector-zmov.ll new file mode 100644 index 00000000000..4de2543a1d6 --- /dev/null +++ b/llvm/test/CodeGen/X86/vector-zmov.ll @@ -0,0 +1,37 @@ +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 + +define <4 x i32> @load_zmov_4i32_to_0zzz(<4 x i32> *%ptr) { +; SSE-LABEL: load_zmov_4i32_to_0zzz: +; SSE: # BB#0: # %entry +; SSE-NEXT: movd (%rdi), %xmm0 +; SSE-NEXT: retq + +; AVX-LABEL: load_zmov_4i32_to_0zzz: +; AVX: # BB#0: # %entry +; AVX-NEXT: vmovd (%rdi), %xmm0 +; AVX-NEXT: retq +entry: + %X = load <4 x i32>* %ptr + %Y = shufflevector <4 x i32> %X, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 4> + ret <4 x i32>%Y +} + +define <2 x i64> @load_zmov_2i64_to_0z(<2 x i64> *%ptr) { +; SSE-LABEL: load_zmov_2i64_to_0z: +; SSE: # BB#0: # %entry +; SSE-NEXT: movq (%rdi), %xmm0 +; SSE-NEXT: retq + +; AVX-LABEL: load_zmov_2i64_to_0z: +; AVX: # BB#0: # %entry +; AVX-NEXT: vmovq (%rdi), %xmm0 +; AVX-NEXT: retq +entry: + %X = load <2 x i64>* %ptr + %Y = shufflevector <2 x i64> %X, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 2> + ret <2 x i64>%Y +} |
