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authorCraig Topper <craig.topper@intel.com>2018-06-23 06:15:04 +0000
committerCraig Topper <craig.topper@intel.com>2018-06-23 06:15:04 +0000
commitd8d64a56b59ae174bb1322e89adec6b3ded8d2ff (patch)
treed2e4f6038e1b3ce415d0a1eb5d381210394f62c5 /llvm
parent254552903491a3ede54f1b3f6475324641ef1506 (diff)
downloadbcm5719-llvm-d8d64a56b59ae174bb1322e89adec6b3ded8d2ff.tar.gz
bcm5719-llvm-d8d64a56b59ae174bb1322e89adec6b3ded8d2ff.zip
[X86] Make %eiz usage in 64-bit mode, force a 0x67 address size prefix. Fix some test CHECK lines.
llvm-svn: 335414
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp2
-rw-r--r--llvm/test/MC/X86/x86_64-encoding.s16
2 files changed, 12 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 4829aceb38d..f5371db9e77 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -219,6 +219,8 @@ static bool Is32BitMemOperand(const MCInst &MI, unsigned Op) {
assert(IndexReg.getReg() == 0 && "Invalid eip-based address.");
return true;
}
+ if (IndexReg.getReg() == X86::EIZ)
+ return true;
return false;
}
diff --git a/llvm/test/MC/X86/x86_64-encoding.s b/llvm/test/MC/X86/x86_64-encoding.s
index c06948f92f6..bfa7304ca95 100644
--- a/llvm/test/MC/X86/x86_64-encoding.s
+++ b/llvm/test/MC/X86/x86_64-encoding.s
@@ -276,14 +276,18 @@ sha256msg2 (%rax), %xmm2
// CHECK: encoding: [0x66,0x0f,0xc4,0xe9,0x03]
pinsrw $3, %rcx, %xmm5
-//CHECK movq 12(%rdi), %rsi
-//CHECK encoding: [0x48,0x8b,0x77,0x0c]
+//CHECK: movq 12(%rdi), %rsi
+//CHECK: encoding: [0x48,0x8b,0x77,0x0c]
movq 16+0-4(%rdi),%rsi
-//CHECK movq 12(%rdi), %rsi
-//CHECK encoding: [0x48,0x8b,0x77,0x0c]
+//CHECK: movq 12(%rdi), %rsi
+//CHECK: encoding: [0x48,0x8b,0x77,0x0c]
movq (16+(0-4))(%rdi),%rsi
-//CHECK movq 12(%rdi), %rsi
-//CHECK encoding: [0x48,0x8b,0x77,0x0c]
+//CHECK: movq 12(%rdi), %rsi
+//CHECK: encoding: [0x48,0x8b,0x77,0x0c]
movq (16+0)-1+1-2+2-3+3-4+4-5+5-6+6-(4)(%rdi),%rsi
+
+//CHECK: movq (,%eiz), %rax
+//CHECK: encoding: [0x67,0x48,0x8b,0x04,0x25,0x00,0x00,0x00,0x00]
+ movq (,%eiz), %rax
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