diff options
| author | Kevin Enderby <enderby@apple.com> | 2014-04-08 18:00:52 +0000 |
|---|---|---|
| committer | Kevin Enderby <enderby@apple.com> | 2014-04-08 18:00:52 +0000 |
| commit | d88fec3d3acc049d4fc5b83d5093b85a5f11ca81 (patch) | |
| tree | ee722e81e825f2f1011a91d9c6f26c9b84908bb0 /llvm | |
| parent | 6df5254d6f8b29fcd79030a30392a772d470f530 (diff) | |
| download | bcm5719-llvm-d88fec3d3acc049d4fc5b83d5093b85a5f11ca81.tar.gz bcm5719-llvm-d88fec3d3acc049d4fc5b83d5093b85a5f11ca81.zip | |
Fix the ARM VLD3 (single 3-element structure to all lanes)
size 16 double-spaced registers instruction printing.
This:
vld3.16 {d0[], d2[], d4[]}, [r4]!
was being printed as:
vld3.16 {d0[], d1[], d2[]}, [r4]!
rdar://16531387
llvm-svn: 205779
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/neon-vld-encoding.s | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index c4d53bb91f4..0ccb5beb7b8 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -5901,7 +5901,7 @@ static unsigned getRealVLDOpcode(unsigned Opc, unsigned &Spacing) { case ARM::VLD3DUPdWB_fixed_Asm_16: Spacing = 1; return ARM::VLD3DUPd16_UPD; case ARM::VLD3DUPdWB_fixed_Asm_32: Spacing = 1; return ARM::VLD3DUPd32_UPD; case ARM::VLD3DUPqWB_fixed_Asm_8: Spacing = 1; return ARM::VLD3DUPq8_UPD; - case ARM::VLD3DUPqWB_fixed_Asm_16: Spacing = 1; return ARM::VLD3DUPq16_UPD; + case ARM::VLD3DUPqWB_fixed_Asm_16: Spacing = 2; return ARM::VLD3DUPq16_UPD; case ARM::VLD3DUPqWB_fixed_Asm_32: Spacing = 2; return ARM::VLD3DUPq32_UPD; case ARM::VLD3DUPdWB_register_Asm_8: Spacing = 1; return ARM::VLD3DUPd8_UPD; case ARM::VLD3DUPdWB_register_Asm_16: Spacing = 1; return ARM::VLD3DUPd16_UPD; diff --git a/llvm/test/MC/ARM/neon-vld-encoding.s b/llvm/test/MC/ARM/neon-vld-encoding.s index 3fcbe3e9027..b96784e4689 100644 --- a/llvm/test/MC/ARM/neon-vld-encoding.s +++ b/llvm/test/MC/ARM/neon-vld-encoding.s @@ -367,7 +367,7 @@ @ CHECK: vld3.16 {d16[], d17[], d18[]}, [r2]! @ encoding: [0x4d,0x0e,0xe2,0xf4] @ CHECK: vld3.32 {d16[], d17[], d18[]}, [r3]! @ encoding: [0x8d,0x0e,0xe3,0xf4] @ CHECK: vld3.8 {d17[], d18[], d19[]}, [r7]! @ encoding: [0x2d,0x1e,0xe7,0xf4] -@ CHECK: vld3.16 {d17[], d18[], d19[]}, [r7]! @ encoding: [0x6d,0x1e,0xe7,0xf4] +@ CHECK: vld3.16 {d17[], d19[], d21[]}, [r7]! @ encoding: [0x6d,0x1e,0xe7,0xf4] @ CHECK: vld3.32 {d16[], d18[], d20[]}, [r8]! @ encoding: [0xad,0x0e,0xe8,0xf4] @ CHECK: vld3.8 {d16[], d17[], d18[]}, [r1], r8 @ encoding: [0x08,0x0e,0xe1,0xf4] @ CHECK: vld3.16 {d16[], d17[], d18[]}, [r2], r7 @ encoding: [0x47,0x0e,0xe2,0xf4] |
