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| author | Simon Dardis <simon.dardis@mips.com> | 2018-04-12 14:41:38 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@mips.com> | 2018-04-12 14:41:38 +0000 |
| commit | d886aba39de026da3765f67d3706112b926534c5 (patch) | |
| tree | 8d345ac7d339a72c9b776cffe376436776f53aa5 /llvm | |
| parent | 8904a86f65b8e7a1a28ec188659d735b3970a883 (diff) | |
| download | bcm5719-llvm-d886aba39de026da3765f67d3706112b926534c5.tar.gz bcm5719-llvm-d886aba39de026da3765f67d3706112b926534c5.zip | |
[mips] Correct the predicates of the load/store (double)word for coprocessor 3.
llvm-svn: 329913
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 10 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/cnmips/invalid-wrong-error.s | 8 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s | 2 |
4 files changed, 18 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index 9ee9e344f3c..cdbceebb21c 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -2040,12 +2040,14 @@ def SDC2 : StdMMR6Rel, SW_FT2<"sdc2", COP2Opnd, II_SDC2, store>, // COP3 Memory Instructions let DecoderNamespace = "COP3_" in { - def LWC3 : LW_FT3<"lwc3", COP3Opnd, II_LWC3, load>, LW_FM<0x33>; - def SWC3 : SW_FT3<"swc3", COP3Opnd, II_SWC3, store>, LW_FM<0x3b>; + def LWC3 : LW_FT3<"lwc3", COP3Opnd, II_LWC3, load>, LW_FM<0x33>, + ISA_MIPS1_NOT_32R6_64R6, NOT_ASE_CNMIPS; + def SWC3 : SW_FT3<"swc3", COP3Opnd, II_SWC3, store>, LW_FM<0x3b>, + ISA_MIPS1_NOT_32R6_64R6, NOT_ASE_CNMIPS; def LDC3 : LW_FT3<"ldc3", COP3Opnd, II_LDC3, load>, LW_FM<0x37>, - ISA_MIPS2; + ISA_MIPS2, NOT_ASE_CNMIPS; def SDC3 : SW_FT3<"sdc3", COP3Opnd, II_SDC3, store>, LW_FM<0x3f>, - ISA_MIPS2; + ISA_MIPS2, NOT_ASE_CNMIPS; } def SYNC : MMRel, StdMMR6Rel, SYNC_FT<"sync">, SYNC_FM, ISA_MIPS2; diff --git a/llvm/test/MC/Mips/cnmips/invalid-wrong-error.s b/llvm/test/MC/Mips/cnmips/invalid-wrong-error.s new file mode 100644 index 00000000000..aa96049c9b7 --- /dev/null +++ b/llvm/test/MC/Mips/cnmips/invalid-wrong-error.s @@ -0,0 +1,8 @@ +# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=octeon 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + lwc3 $4, 0($5) # CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: invalid operand for instruction + swc3 $4, 0($5) # CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: invalid operand for instruction + ldc3 $4, 0($5) # CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: invalid operand for instruction + sdc3 $4, 0($5) # CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: invalid operand for instruction diff --git a/llvm/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s b/llvm/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s index 6d569d12b39..2f934790dd1 100644 --- a/llvm/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s +++ b/llvm/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s @@ -16,3 +16,5 @@ swle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swre $24, 5($3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + lwc3 $12, 4($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + swc3 $12, 4($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/llvm/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s b/llvm/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s index 06d95fd8665..f6a4d9f9bcc 100644 --- a/llvm/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s +++ b/llvm/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s @@ -15,3 +15,5 @@ lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + lwc3 $12, 4($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + swc3 $12, 4($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction |
