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| author | Dale Johannesen <dalej@apple.com> | 2010-12-21 20:00:06 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2010-12-21 20:00:06 +0000 |
| commit | d64931df774943c555959173506e5fe37960e788 (patch) | |
| tree | c152127e78943a586bfd4941f0723e1cf68bfd35 /llvm | |
| parent | 3635eae697ad4cfa8132f1cc904fe9138cb0f399 (diff) | |
| download | bcm5719-llvm-d64931df774943c555959173506e5fe37960e788.tar.gz bcm5719-llvm-d64931df774943c555959173506e5fe37960e788.zip | |
Shift by the word size is invalid IR; don't create it.
llvm-svn: 122353
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 75d6013ff23..c58dede823c 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2967,7 +2967,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) { N0.getOperand(1).getOpcode() == ISD::Constant) { uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getZExtValue(); uint64_t c2 = N1C->getZExtValue(); - if (c1 + c2 > OpSizeInBits) + if (c1 + c2 >= OpSizeInBits) return DAG.getConstant(0, VT); return DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, N0.getOperand(0), DAG.getConstant(c1 + c2, N1.getValueType())); @@ -3165,7 +3165,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { N0.getOperand(1).getOpcode() == ISD::Constant) { uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getZExtValue(); uint64_t c2 = N1C->getZExtValue(); - if (c1 + c2 > OpSizeInBits) + if (c1 + c2 >= OpSizeInBits) return DAG.getConstant(0, VT); return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0.getOperand(0), DAG.getConstant(c1 + c2, N1.getValueType())); |
