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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-19 14:02:16 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-19 14:02:16 +0000 |
| commit | d5e28782529f5fb0c581aa416dbc196f865e028f (patch) | |
| tree | bf315afac78b534fb70433673b62e98bdf0d8cf2 /llvm | |
| parent | bd7958d7ca8fc4194423da54f8d9f421153aed0a (diff) | |
| download | bcm5719-llvm-d5e28782529f5fb0c581aa416dbc196f865e028f.tar.gz bcm5719-llvm-d5e28782529f5fb0c581aa416dbc196f865e028f.zip | |
[X86][SSE] Add 'redundant pand' test case from PR34620
llvm-svn: 313632
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/test/CodeGen/X86/combine-and.ll | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/combine-and.ll b/llvm/test/CodeGen/X86/combine-and.ll index f30fa61bbfb..5ce3f32cfd2 100644 --- a/llvm/test/CodeGen/X86/combine-and.ll +++ b/llvm/test/CodeGen/X86/combine-and.ll @@ -270,3 +270,22 @@ define <4 x i32> @ashr_mask7_v4i32(<4 x i32> %a0) { %2 = and <4 x i32> %1, <i32 7, i32 7, i32 7, i32 7> ret <4 x i32> %2 } + +; +; SimplifyDemandedBits +; + +; PR34620 - redundant PAND after vector shift of a byte vector (PSRLW) +define <16 x i8> @PR34620(<16 x i8> %a0, <16 x i8> %a1) { +; CHECK-LABEL: PR34620: +; CHECK: # BB#0: +; CHECK-NEXT: psrlw $1, %xmm0 +; CHECK-NEXT: pand {{.*}}(%rip), %xmm0 +; CHECK-NEXT: pand {{.*}}(%rip), %xmm0 +; CHECK-NEXT: paddb %xmm1, %xmm0 +; CHECK-NEXT: retq + %1 = lshr <16 x i8> %a0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1> + %2 = and <16 x i8> %1, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1> + %3 = add <16 x i8> %2, %a1 + ret <16 x i8> %3 +} |
