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| author | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-02-11 19:46:36 +0000 |
|---|---|---|
| committer | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-02-11 19:46:36 +0000 |
| commit | d30b1a2ac7d79d69ddb19fc03ac5104bb434e746 (patch) | |
| tree | 044fab3a06b97f2a3c6a8417af7f68223fe70c58 /llvm | |
| parent | b0fdab26d17293c6442bcf81573864212119dd5e (diff) | |
| download | bcm5719-llvm-d30b1a2ac7d79d69ddb19fc03ac5104bb434e746.tar.gz bcm5719-llvm-d30b1a2ac7d79d69ddb19fc03ac5104bb434e746.zip | |
*fixed disassembly of some i386 system insts with intel syntax
*added file for test cases for i386 intel syntax
llvm-svn: 174900
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSystem.td | 8 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/intel-syntax-32.txt | 13 |
2 files changed, 17 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td index ea716bfd6bd..3caa1b538c3 100644 --- a/llvm/lib/Target/X86/X86InstrSystem.td +++ b/llvm/lib/Target/X86/X86InstrSystem.td @@ -352,11 +352,11 @@ def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg), // Descriptor-table support instructions def SGDT16m : I<0x01, MRM0m, (outs opaque48mem:$dst), (ins), - "sgdtw\t$dst", [], IIC_SGDT>, TB, OpSize, Requires<[In32BitMode]>; + "sgdt{w}\t$dst", [], IIC_SGDT>, TB, OpSize, Requires<[In32BitMode]>; def SGDTm : I<0x01, MRM0m, (outs opaque48mem:$dst), (ins), "sgdt\t$dst", [], IIC_SGDT>, TB; def SIDT16m : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins), - "sidtw\t$dst", [], IIC_SIDT>, TB, OpSize, Requires<[In32BitMode]>; + "sidt{w}\t$dst", [], IIC_SIDT>, TB, OpSize, Requires<[In32BitMode]>; def SIDTm : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins), "sidt\t$dst", []>, TB; def SLDT16r : I<0x00, MRM0r, (outs GR16:$dst), (ins), @@ -374,11 +374,11 @@ def SLDT64m : RI<0x00, MRM0m, (outs i16mem:$dst), (ins), "sldt{q}\t$dst", [], IIC_SLDT>, TB; def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), - "lgdtw\t$src", [], IIC_LGDT>, TB, OpSize, Requires<[In32BitMode]>; + "lgdt{w}\t$src", [], IIC_LGDT>, TB, OpSize, Requires<[In32BitMode]>; def LGDTm : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), "lgdt\t$src", [], IIC_LGDT>, TB; def LIDT16m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src), - "lidtw\t$src", [], IIC_LIDT>, TB, OpSize, Requires<[In32BitMode]>; + "lidt{w}\t$src", [], IIC_LIDT>, TB, OpSize, Requires<[In32BitMode]>; def LIDTm : I<0x01, MRM3m, (outs), (ins opaque48mem:$src), "lidt\t$src", [], IIC_LIDT>, TB; def LLDT16r : I<0x00, MRM2r, (outs), (ins GR16:$src), diff --git a/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt b/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt new file mode 100644 index 00000000000..08bae6ec675 --- /dev/null +++ b/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt @@ -0,0 +1,13 @@ +# RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s + +# CHECK: sgdt +0x0f 0x01 0x00 + +# CHECK: sidt +0x0f 0x01 0x08 + +# CHECK: lgdt +0x0f 0x01 0x10 + +# CHECK: lidt +0x0f 0x01 0x18 |
