Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos.

llvm-svn: 127445

1 files changed, 6 insertions, 6 deletions

diff --git a/llvm/utils/TableGen/ARMDecoderEmitter.cpp b/llvm/utils/TableGen/ARMDecoderEmitter.cpp
index 9119219a444..915f905ba19 100644
--- a/llvm/utils/TableGen/ARMDecoderEmitter.cpp
+++ b/llvm/utils/TableGen/ARMDecoderEmitter.cpp
@@ -1606,12 +1606,12 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
     // better off using the generic RSCri and RSCrs instructions.
     if (Name == "RSCSri" || Name == "RSCSrs") return false;
 
-    // MOVCCi, MOVCCi16, FCYPScc, FCYPDcc, FNEGScc, and
-    // FNEGDcc are used in the compiler to implement conditional moves.
-    // We can ignore them in favor of their more generic versions of
-    // instructions. See also SDNode *ARMDAGToDAGISel::Select(SDValue Op).
-    if (Name == "MOVCCi"  || Name == "MOVCCi16" || Name == "FCPYScc" ||
-        Name == "FCPYDcc" || Name == "FNEGScc"  || Name == "FNEGDcc")
+    // FCYPScc, FCYPDcc, FNEGScc, and FNEGDcc are used in the compiler
+    // to implement conditional moves. We can ignore them in favor of
+    // their more generic versions of instructions. See also
+    // SDNode *ARMDAGToDAGISel::Select(SDValue Op).
+    if (Name == "FCPYScc" || Name == "FCPYDcc" || Name == "FNEGScc" ||
+        Name == "FNEGDcc")
       return false;
 
     // Ditto for VMOVDcc, VMOVScc, VNEGDcc, and VNEGScc.