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authorTom Stellard <thomas.stellard@amd.com>2015-02-13 21:02:33 +0000
committerTom Stellard <thomas.stellard@amd.com>2015-02-13 21:02:33 +0000
commitd09fa9cec89836091787aeef03df28737645ccad (patch)
tree058a1486614086e87f2d20d17dee1e9f7d043684 /llvm
parentbad5a46c05b290b64f764ba4a4eaedc6c8699f25 (diff)
downloadbcm5719-llvm-d09fa9cec89836091787aeef03df28737645ccad.tar.gz
bcm5719-llvm-d09fa9cec89836091787aeef03df28737645ccad.zip
R600/SI: Remove some unused TableGen classes
llvm-svn: 229150
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/R600/SIInstrInfo.td19
1 files changed, 0 insertions, 19 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.td b/llvm/lib/Target/R600/SIInstrInfo.td
index 14c517a3ed7..9a098abea1b 100644
--- a/llvm/lib/Target/R600/SIInstrInfo.td
+++ b/llvm/lib/Target/R600/SIInstrInfo.td
@@ -640,31 +640,12 @@ class getVOPSrc1ForVT<ValueType VT> {
RegisterClass ret = !if(!eq(VT.Size, 32), VGPR_32, VReg_64);
}
-// Returns the register classes for the source arguments of a VOP[12C]
-// instruction for the given SrcVTs.
-class getInRC32 <list<ValueType> SrcVT> {
- list<DAGOperand> ret = [
- getVOPSrc0ForVT<SrcVT[0]>.ret,
- getVOPSrc1ForVT<SrcVT[1]>.ret
- ];
-}
-
// Returns the register class to use for sources of VOP3 instructions for the
// given VT.
class getVOP3SrcForVT<ValueType VT> {
RegisterOperand ret = !if(!eq(VT.Size, 32), VCSrc_32, VCSrc_64);
}
-// Returns the register classes for the source arguments of a VOP3
-// instruction for the given SrcVTs.
-class getInRC64 <list<ValueType> SrcVT> {
- list<DAGOperand> ret = [
- getVOP3SrcForVT<SrcVT[0]>.ret,
- getVOP3SrcForVT<SrcVT[1]>.ret,
- getVOP3SrcForVT<SrcVT[2]>.ret
- ];
-}
-
// Returns 1 if the source arguments have modifiers, 0 if they do not.
class hasModifiers<ValueType SrcVT> {
bit ret = !if(!eq(SrcVT.Value, f32.Value), 1,
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