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authorChris Lattner <sabre@nondot.org>2005-10-19 01:55:23 +0000
committerChris Lattner <sabre@nondot.org>2005-10-19 01:55:23 +0000
commitc8f899f98d8aab9889391805655911cd842ee1bd (patch)
tree7c3634ab8cf4092392346828275baa3fbbb8394b /llvm
parent5f37623218b25eed473f978fe779fee8fc17e9e6 (diff)
downloadbcm5719-llvm-c8f899f98d8aab9889391805655911cd842ee1bd.tar.gz
bcm5719-llvm-c8f899f98d8aab9889391805655911cd842ee1bd.zip
Asserting here is to violent
llvm-svn: 23814
Diffstat (limited to 'llvm')
-rw-r--r--llvm/utils/TableGen/DAGISelEmitter.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp
index d0dc799ac00..12ca95f7d0e 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -462,7 +462,9 @@ static unsigned char getIntrinsicType(Record *R, bool NotRegisters,
// Pattern fragment types will be resolved when they are inlined.
return MVT::isUnknown;
} else if (R->isSubClassOf("Register")) {
- assert(0 && "Explicit registers not handled here yet!\n");
+ //const CodeGenTarget &T = TP.getDAGISelEmitter().getTargetInfo();
+ // TODO: if a register appears in exactly one regclass, we could use that
+ // type info.
return MVT::isUnknown;
} else if (R->isSubClassOf("ValueType")) {
// Using a VTSDNode.
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