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authorEvan Cheng <evan.cheng@apple.com>2007-11-13 17:54:34 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-11-13 17:54:34 +0000
commitc891ae92dc7105033b1acbc7f77487f68e039f70 (patch)
tree279b2a604903c9b245e38e6b23202cccd00b0db3 /llvm
parentb666625493e3e70fcb57f8fe6ab8a920d09a8bf8 (diff)
downloadbcm5719-llvm-c891ae92dc7105033b1acbc7f77487f68e039f70.tar.gz
bcm5719-llvm-c891ae92dc7105033b1acbc7f77487f68e039f70.zip
Fix x86-64 jit: remove reliance on Dwarf numbers.
llvm-svn: 44048
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/X86/X86CodeEmitter.cpp19
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.cpp22
2 files changed, 29 insertions, 12 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp
index 90d361bc2f3..8102ce61e00 100644
--- a/llvm/lib/Target/X86/X86CodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp
@@ -385,13 +385,20 @@ static unsigned sizeOfImm(const TargetInstrDescriptor *Desc) {
bool Emitter::isX86_64ExtendedReg(const MachineOperand &MO) {
if (!MO.isRegister()) return false;
unsigned RegNo = MO.getReg();
- int DWNum = II->getRegisterInfo().getDwarfRegNum(RegNo);
- if (DWNum >= II->getRegisterInfo().getDwarfRegNum(X86::R8) &&
- DWNum <= II->getRegisterInfo().getDwarfRegNum(X86::R15))
- return true;
- if (DWNum >= II->getRegisterInfo().getDwarfRegNum(X86::XMM8) &&
- DWNum <= II->getRegisterInfo().getDwarfRegNum(X86::XMM15))
+ switch (MO.getReg()) {
+ default: break;
+ case X86::R8: case X86::R9: case X86::R10: case X86::R11:
+ case X86::R12: case X86::R13: case X86::R14: case X86::R15:
+ case X86::R8D: case X86::R9D: case X86::R10D: case X86::R11D:
+ case X86::R12D: case X86::R13D: case X86::R14D: case X86::R15D:
+ case X86::R8W: case X86::R9W: case X86::R10W: case X86::R11W:
+ case X86::R12W: case X86::R13W: case X86::R14W: case X86::R15W:
+ case X86::R8B: case X86::R9B: case X86::R10B: case X86::R11B:
+ case X86::R12B: case X86::R13B: case X86::R14B: case X86::R15B:
+ case X86::XMM8: case X86::XMM9: case X86::XMM10: case X86::XMM11:
+ case X86::XMM12: case X86::XMM13: case X86::XMM14: case X86::XMM15:
return true;
+ }
return false;
}
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 9d8a208c6ea..ee754dfb4e0 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -713,12 +713,22 @@ unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) {
case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7:
return RegNo-X86::ST0;
- case X86::XMM0: case X86::XMM1: case X86::XMM2: case X86::XMM3:
- case X86::XMM4: case X86::XMM5: case X86::XMM6: case X86::XMM7:
- return getDwarfRegNum(RegNo) - getDwarfRegNum(X86::XMM0);
- case X86::XMM8: case X86::XMM9: case X86::XMM10: case X86::XMM11:
- case X86::XMM12: case X86::XMM13: case X86::XMM14: case X86::XMM15:
- return getDwarfRegNum(RegNo) - getDwarfRegNum(X86::XMM8);
+ case X86::XMM0: case X86::XMM8:
+ return 0;
+ case X86::XMM1: case X86::XMM9:
+ return 1;
+ case X86::XMM2: case X86::XMM10:
+ return 2;
+ case X86::XMM3: case X86::XMM11:
+ return 3;
+ case X86::XMM4: case X86::XMM12:
+ return 4;
+ case X86::XMM5: case X86::XMM13:
+ return 5;
+ case X86::XMM6: case X86::XMM14:
+ return 6;
+ case X86::XMM7: case X86::XMM15:
+ return 7;
default:
assert(isVirtualRegister(RegNo) && "Unknown physical register!");
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