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authorDan Gohman <gohman@apple.com>2008-06-30 20:33:57 +0000
committerDan Gohman <gohman@apple.com>2008-06-30 20:33:57 +0000
commitc7779faf001097376f391a6b6367507c3c910d10 (patch)
tree6fa2d64bb9339fef1f2c8bab3fb68f426bbc4802 /llvm
parent31c8123d07123bb6019d1cb8afbea1531bd266ca (diff)
downloadbcm5719-llvm-c7779faf001097376f391a6b6367507c3c910d10.tar.gz
bcm5719-llvm-c7779faf001097376f391a6b6367507c3c910d10.zip
Change bools to 1-bit bitfields to shrink ArgListEntry slightly.
llvm-svn: 52918
Diffstat (limited to 'llvm')
-rw-r--r--llvm/include/llvm/Target/TargetLowering.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/include/llvm/Target/TargetLowering.h b/llvm/include/llvm/Target/TargetLowering.h
index 8822a1736ad..afa8174e5f7 100644
--- a/llvm/include/llvm/Target/TargetLowering.h
+++ b/llvm/include/llvm/Target/TargetLowering.h
@@ -975,12 +975,12 @@ public:
struct ArgListEntry {
SDOperand Node;
const Type* Ty;
- bool isSExt;
- bool isZExt;
- bool isInReg;
- bool isSRet;
- bool isNest;
- bool isByVal;
+ bool isSExt : 1;
+ bool isZExt : 1;
+ bool isInReg : 1;
+ bool isSRet : 1;
+ bool isNest : 1;
+ bool isByVal : 1;
uint16_t Alignment;
ArgListEntry() : isSExt(false), isZExt(false), isInReg(false),
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