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| author | Chris Lattner <sabre@nondot.org> | 2006-10-07 06:33:36 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-10-07 06:33:36 +0000 |
| commit | c6138cec6183b9a46deea8c443d12b5f296b5209 (patch) | |
| tree | 1ff72385994355f732c1576028f7fd638573917c /llvm | |
| parent | 87e692323c774abb0e18a06a25554330e7f7420c (diff) | |
| download | bcm5719-llvm-c6138cec6183b9a46deea8c443d12b5f296b5209.tar.gz bcm5719-llvm-c6138cec6183b9a46deea8c443d12b5f296b5209.zip | |
move class defns close to uses to make it easier to read
llvm-svn: 30795
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 35 |
1 files changed, 18 insertions, 17 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 67f9ba6df5f..ad26e8e85c5 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -255,23 +255,6 @@ class PD_Intrm<bits<8> o, string OpcodeStr, Intrinsic IntId> !strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"), [(set VR128:$dst, (IntId VR128:$src1, (load addr:$src2)))]>; -class S3D_Intrr<bits<8> o, string OpcodeStr, Intrinsic IntId> - : S3DI<o, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - !strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"), - [(set VR128:$dst, (v4f32 (IntId VR128:$src1, VR128:$src2)))]>; -class S3D_Intrm<bits<8> o, string OpcodeStr, Intrinsic IntId> - : S3DI<o, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2), - !strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"), - [(set VR128:$dst, (v4f32 (IntId VR128:$src1, (load addr:$src2))))]>; -class S3_Intrr<bits<8> o, string OpcodeStr, Intrinsic IntId> - : S3I<o, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), - !strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"), - [(set VR128:$dst, (v2f64 (IntId VR128:$src1, VR128:$src2)))]>; -class S3_Intrm<bits<8> o, string OpcodeStr, Intrinsic IntId> - : S3I<o, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2), - !strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"), - [(set VR128:$dst, (v2f64 (IntId VR128:$src1, (load addr:$src2))))]>; - // Some 'special' instructions def IMPLICIT_DEF_FR32 : I<0, Pseudo, (ops FR32:$dst), "#IMPLICIT_DEF $dst", @@ -1236,6 +1219,24 @@ def UNPCKLPDrm : PDI<0x14, MRMSrcMem, } // Horizontal ops + +class S3D_Intrr<bits<8> o, string OpcodeStr, Intrinsic IntId> + : S3DI<o, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + !strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"), + [(set VR128:$dst, (v4f32 (IntId VR128:$src1, VR128:$src2)))]>; +class S3D_Intrm<bits<8> o, string OpcodeStr, Intrinsic IntId> + : S3DI<o, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2), + !strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"), + [(set VR128:$dst, (v4f32 (IntId VR128:$src1, (load addr:$src2))))]>; +class S3_Intrr<bits<8> o, string OpcodeStr, Intrinsic IntId> + : S3I<o, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + !strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"), + [(set VR128:$dst, (v2f64 (IntId VR128:$src1, VR128:$src2)))]>; +class S3_Intrm<bits<8> o, string OpcodeStr, Intrinsic IntId> + : S3I<o, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2), + !strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"), + [(set VR128:$dst, (v2f64 (IntId VR128:$src1, (load addr:$src2))))]>; + let isTwoAddress = 1 in { def HADDPSrr : S3D_Intrr<0x7C, "haddps", int_x86_sse3_hadd_ps>; def HADDPSrm : S3D_Intrm<0x7C, "haddps", int_x86_sse3_hadd_ps>; |
