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| author | Joerg Sonnenberger <joerg@bec.de> | 2014-07-30 22:51:15 +0000 |
|---|---|---|
| committer | Joerg Sonnenberger <joerg@bec.de> | 2014-07-30 22:51:15 +0000 |
| commit | c5fe19d06265fcde822cd549d3c90d27c11e320e (patch) | |
| tree | 61ddea0f873864677d65fea61e23ba62bd1d84aa /llvm | |
| parent | 7b1e1a0d8e7d6c51f59c93323ec1c1aaa96a6dae (diff) | |
| download | bcm5719-llvm-c5fe19d06265fcde822cd549d3c90d27c11e320e.tar.gz bcm5719-llvm-c5fe19d06265fcde822cd549d3c90d27c11e320e.zip | |
Refactor TLBIVAX and add tlbsx.
llvm-svn: 214354
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrFormats.td | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 13 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt | 2 | ||||
| -rw-r--r-- | llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s | 3 |
4 files changed, 15 insertions, 8 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td index d40a9ab882a..18d77cdd803 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td +++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td @@ -380,6 +380,11 @@ class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asms let Inst{31} = RC; } +class XForm_tlb<bits<10> xo, dag OOL, dag IOL, string asmstr, + InstrItinClass itin> : XForm_base_r3xo<31, xo, OOL, IOL, asmstr, itin, []> { + let RST = 0; +} + // This is the same as XForm_base_r3xo, but the first two operands are swapped // when code is emitted. class XForm_base_r3xo_swapped diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index c18e6d51bd9..cd30848ceda 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -3103,14 +3103,11 @@ def TLBIEL : XForm_16b<31, 274, (outs), (ins gprc:$RB), def TLBIE : XForm_26<31, 306, (outs), (ins gprc:$RS, gprc:$RB), "tlbie $RB,$RS", IIC_SprTLBIE, []>; -def TLBIVAX : I<31, (outs), (ins gprc:$RA, gprc:$RB), "tlbivax $RA, $RB", - IIC_LdStLoad>, Requires<[IsBookE]> { - bits<5> RA; - bits<5> RB; - let Inst{11-15} = RA; - let Inst{16-20} = RB; - let Inst{21-30} = 786; -} +def TLBSX : XForm_tlb<914, (outs), (ins gprc:$A, gprc:$B), "tlbsx $A, $B", + IIC_LdStLoad>, Requires<[IsBookE]>; + +def TLBIVAX : XForm_tlb<786, (outs), (ins gprc:$A, gprc:$B), "tlbivax $A, $B", + IIC_LdStLoad>, Requires<[IsBookE]>; def TLBRE : XForm_24_eieio<31, 946, (outs), (ins), "tlbre", IIC_LdStLoad, []>, Requires<[IsBookE]>; diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt index f341431f9a8..7996ed178a1 100644 --- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt +++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt @@ -123,3 +123,5 @@ 0x7c 0x00 0x07 0xa4 # CHECK: tlbivax 11, 12 0x7c 0x0b 0x66 0x24 +# CHECK: tlbsx 11, 12 +0x7c 0x0b 0x67 0x24 diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s b/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s index 2dd98a3cd84..9e784dbb5e9 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s @@ -182,3 +182,6 @@ # CHECK-BE: tlbivax 11, 12 # encoding: [0x7c,0x0b,0x66,0x24] # CHECK-LE: tlbivax 11, 12 # encoding: [0x24,0x66,0x0b,0x7c] tlbivax %r11, %r12 +# CHECK-BE: tlbsx 11, 12 # encoding: [0x7c,0x0b,0x67,0x24] +# CHECK-LE: tlbsx 11, 12 # encoding: [0x24,0x67,0x0b,0x7c] + tlbsx %r11, %r12 |
