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| author | Adrian Prantl <aprantl@apple.com> | 2018-02-13 01:17:35 +0000 | 
|---|---|---|
| committer | Adrian Prantl <aprantl@apple.com> | 2018-02-13 01:17:35 +0000 | 
| commit | c5ec51ef4f5da9afbb4554f1535b07015b79cae9 (patch) | |
| tree | 249eed3460c6ecb6c7de2861b22dfba97715c951 /llvm | |
| parent | 4011c26cc7cc3762a20d3927fc8cd80ad7b4d893 (diff) | |
| download | bcm5719-llvm-c5ec51ef4f5da9afbb4554f1535b07015b79cae9.tar.gz bcm5719-llvm-c5ec51ef4f5da9afbb4554f1535b07015b79cae9.zip | |
Revert "Document the shortcomings of DwarfExpression::addMachineReg()."
This reverts commit r324972. This commit broke a bot, so perhaps it is
testable after all?
llvm-svn: 324977
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp | 10 | 
1 files changed, 3 insertions, 7 deletions
| diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp index 3b2eb41418d..06095fe9337 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp @@ -123,10 +123,7 @@ bool DwarfExpression::addMachineReg(const TargetRegisterInfo &TRI,    const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(MachineReg);    unsigned RegSize = TRI.getRegSizeInBits(*RC);    // Keep track of the bits in the register we already emitted, so we -  // can avoid emitting redundant aliasing subregs. Because this is -  // just doing a greedy scan of all subregisters, it is possible that -  // this doesn't find a combination of subregisters that fully cover -  // the register (even though one may exist). +  // can avoid emitting redundant aliasing subregs.    SmallBitVector Coverage(RegSize, false);    for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) {      unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR); @@ -146,7 +143,7 @@ bool DwarfExpression::addMachineReg(const TargetRegisterInfo &TRI,      if (CurSubReg.test(Coverage)) {        // Emit a piece for any gap in the coverage.        if (Offset > CurPos) -        DwarfRegs.push_back({-1, Offset - CurPos, "no DWARF register encoding"}); +        DwarfRegs.push_back({-1, Offset - CurPos, nullptr});        DwarfRegs.push_back(            {Reg, std::min<unsigned>(Size, MaxSize - Offset), "sub-register"});        if (Offset >= MaxSize) @@ -157,8 +154,7 @@ bool DwarfExpression::addMachineReg(const TargetRegisterInfo &TRI,        CurPos = Offset + Size;      }    } -  if (CurPos < RegSize) -    DwarfRegs.push_back({-1, RegSize - CurPos, "no DWARF register encoding"}); +    return CurPos;  } | 

