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| author | Bill Wendling <isanbard@gmail.com> | 2009-03-31 08:26:26 +0000 | 
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2009-03-31 08:26:26 +0000 | 
| commit | c4b08e5eb000c7f6431d9a287cd7257cbb620b0e (patch) | |
| tree | 799ee6884c2d1bf2cdd904ad85cb7037208107f8 /llvm | |
| parent | fe4847e331919fae7976cd72d1d021fcf613642f (diff) | |
| download | bcm5719-llvm-c4b08e5eb000c7f6431d9a287cd7257cbb620b0e.tar.gz bcm5719-llvm-c4b08e5eb000c7f6431d9a287cd7257cbb620b0e.zip  | |
Revert r68073. It's causing a failure in the Apple-style builds.
llvm-svn: 68092
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/include/llvm/CodeGen/MachineBasicBlock.h | 9 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/Spiller.cpp | 93 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/Spiller.h | 9 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/VirtRegMap.cpp | 23 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/VirtRegMap.h | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp | 7 | 
6 files changed, 96 insertions, 47 deletions
diff --git a/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/llvm/include/llvm/CodeGen/MachineBasicBlock.h index f962273d2be..1ba7e798f83 100644 --- a/llvm/include/llvm/CodeGen/MachineBasicBlock.h +++ b/llvm/include/llvm/CodeGen/MachineBasicBlock.h @@ -253,15 +253,6 @@ public:    /// it returns end()    iterator getFirstTerminator(); -  /// isOnlyReachableViaFallthough - Return true if this basic block has -  /// exactly one predecessor and the control transfer mechanism between -  /// the predecessor and this block is a fall-through. -  bool isOnlyReachableByFallthrough() const { -    return !pred_empty() && -           next(pred_begin()) == pred_end() && -           (*pred_begin())->getFirstTerminator() == (*pred_begin())->end(); -  } -    void pop_front() { Insts.pop_front(); }    void pop_back() { Insts.pop_back(); }    void push_back(MachineInstr *MI) { Insts.push_back(MI); } diff --git a/llvm/lib/CodeGen/Spiller.cpp b/llvm/lib/CodeGen/Spiller.cpp index 7b2a32f1c76..4bfae39c42d 100644 --- a/llvm/lib/CodeGen/Spiller.cpp +++ b/llvm/lib/CodeGen/Spiller.cpp @@ -578,6 +578,20 @@ bool LocalSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {    DOUT << "**** Post Machine Instrs ****\n";    DEBUG(MF.dump()); +  // See if any of the spills we added are actually dead and can be deleted. +  for (std::vector<MachineInstr*> >::iterator +         I = AddedSpills.begin(), E = AddedSpills.end(); I != E; ++I) { +    MachineInstr *MI = *I; + +    if (VRM.OnlyUseOfStackSlot(MI)) { +      MachineBasicBlock *MBB = MI->getParent(); +      DOUT << "Removed dead store:\t" << *MI; +      VRM.RemoveMachineInstrFromMaps(MI); +      MBB->erase(MI); +      ++NumDSE; +    } +  } +    // Mark unused spill slots.    MachineFrameInfo *MFI = MF.getFrameInfo();    int SS = VRM.getLowSpillSlot(); @@ -588,6 +602,7 @@ bool LocalSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {          ++NumDSS;        } +  AddedSpills.clear();    return true;  } @@ -798,9 +813,50 @@ bool LocalSpiller::CommuteToFoldReload(MachineBasicBlock &MBB,    return false;  } +void LocalSpiller::RemoveDeadStore(MachineInstr *Store, +                                   MachineBasicBlock &MBB, +                                   MachineBasicBlock::iterator &MII, +                                   SmallSet<MachineInstr*, 4> &ReMatDefs, +                                   BitVector &RegKills, +                                   std::vector<MachineOperand*> &KillOps, +                                   VirtRegMap &VRM) { +  // If there is a dead store to this stack slot, nuke it now. +  DOUT << "Removed dead store:\t" << *Store; +  ++NumDSE; +  SmallVector<unsigned, 2> KillRegs; +  InvalidateKills(*Store, RegKills, KillOps, &KillRegs); + +  MachineBasicBlock::iterator PrevMII = Store; +  bool CheckDef = PrevMII != MBB.begin(); +  if (CheckDef) --PrevMII; + +  VRM.RemoveMachineInstrFromMaps(Store); +  MBB.erase(Store); + +  if (CheckDef) { +    // Look at defs of killed registers on the store. Mark the defs as dead +    // since the store has been deleted and they aren't being reused. +    for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) { +      bool HasOtherDef = false; + +      if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) { +        MachineInstr *DeadDef = PrevMII; + +        if (ReMatDefs.count(DeadDef) && !HasOtherDef) { +          // FIXME: This assumes a remat def does not have side effects. +          VRM.RemoveMachineInstrFromMaps(DeadDef); +          MBB.erase(DeadDef); +          ++NumDRM; +        } +      } +    } +  } +} +  /// SpillRegToStackSlot - Spill a register to a specified stack slot. Check if  /// the last store to the same slot is now dead. If so, remove the last store. -void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB, +void +LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,                                    MachineBasicBlock::iterator &MII,                                    int Idx, unsigned PhysReg, int StackSlot,                                    const TargetRegisterClass *RC, @@ -816,36 +872,8 @@ void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,    DOUT << "Store:\t" << *StoreMI;    // If there is a dead store to this stack slot, nuke it now. -  if (LastStore) { -    DOUT << "Removed dead store:\t" << *LastStore; -    ++NumDSE; -    SmallVector<unsigned, 2> KillRegs; -    InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs); -    MachineBasicBlock::iterator PrevMII = LastStore; -    bool CheckDef = PrevMII != MBB.begin(); -    if (CheckDef) -      --PrevMII; -    VRM.RemoveMachineInstrFromMaps(LastStore); -    MBB.erase(LastStore); -    if (CheckDef) { -      // Look at defs of killed registers on the store. Mark the defs -      // as dead since the store has been deleted and they aren't -      // being reused. -      for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) { -        bool HasOtherDef = false; -        if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) { -          MachineInstr *DeadDef = PrevMII; -          if (ReMatDefs.count(DeadDef) && !HasOtherDef) { -            // FIXME: This assumes a remat def does not have side -            // effects. -            VRM.RemoveMachineInstrFromMaps(DeadDef); -            MBB.erase(DeadDef); -            ++NumDRM; -          } -        } -      } -    } -  } +  if (LastStore) +    RemoveDeadStore(LastStore, MBB, MII, ReMatDefs, RegKills, KillOps, VRM);    LastStore = next(MII); @@ -1060,6 +1088,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,      if (VRM.isSpillPt(&MI)) {        std::vector<std::pair<unsigned,bool> > &SpillRegs =          VRM.getSpillPtSpills(&MI); +        for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) {          unsigned VirtReg = SpillRegs[i].first;          bool isKill = SpillRegs[i].second; @@ -1073,7 +1102,9 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,          VRM.addSpillSlotUse(StackSlot, StoreMI);          DOUT << "Store:\t" << *StoreMI;          VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod); +        AddedSpills.push_back(StoreMI);        } +        NextMII = next(MII);      } diff --git a/llvm/lib/CodeGen/Spiller.h b/llvm/lib/CodeGen/Spiller.h index 5a42a8279db..0ac6fa0db6c 100644 --- a/llvm/lib/CodeGen/Spiller.h +++ b/llvm/lib/CodeGen/Spiller.h @@ -285,6 +285,7 @@ namespace llvm {      const TargetRegisterInfo *TRI;      const TargetInstrInfo *TII;      DenseMap<MachineInstr*, unsigned> DistanceMap; +    std::vector<MachineInstr*> AddedSpills;    public:      bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM);    private: @@ -305,6 +306,14 @@ namespace llvm {                               std::vector<MachineOperand*> &KillOps,                               const TargetRegisterInfo *TRI,                               VirtRegMap &VRM); +    void RemoveDeadStore(MachineInstr *Store, +                         MachineBasicBlock &MBB, +                         MachineBasicBlock::iterator &MII, +                         SmallSet<MachineInstr*, 4> &ReMatDefs, +                         BitVector &RegKills, +                         std::vector<MachineOperand*> &KillOps, +                         VirtRegMap &VRM); +      void SpillRegToStackSlot(MachineBasicBlock &MBB,                               MachineBasicBlock::iterator &MII,                               int Idx, unsigned PhysReg, int StackSlot, diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp index cb0f764343e..c5bfcfd3012 100644 --- a/llvm/lib/CodeGen/VirtRegMap.cpp +++ b/llvm/lib/CodeGen/VirtRegMap.cpp @@ -188,7 +188,7 @@ void VirtRegMap::RemoveMachineInstrFromMaps(MachineInstr *MI) {      if (MF->getFrameInfo()->isFixedObjectIndex(FI))        continue;      // This stack reference was produced by instruction selection and -    // is not a spill +    // is not a spill.      if (FI < LowSpillSlot)        continue;      assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size() @@ -201,6 +201,27 @@ void VirtRegMap::RemoveMachineInstrFromMaps(MachineInstr *MI) {    EmergencySpillMap.erase(MI);  } +bool VirtRegMap::OnlyUseOfStackSlot(const MachineInstr *MI) const { +  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { +    const MachineOperand &MO = MI->getOperand(i); +    if (!MO.isFI()) +      continue; +    int FI = MO.getIndex(); +    if (MF->getFrameInfo()->isFixedObjectIndex(FI)) +      continue; +    // This stack reference was produced by instruction selection and +    // is not a spill. +    if (FI < LowSpillSlot) +      continue; +    assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size() +           && "Invalid spill slot"); +    if (SpillSlotToUsesMap[FI - LowSpillSlot].size() != 1) +      return false; +  } + +  return true; +} +  void VirtRegMap::print(std::ostream &OS, const Module* M) const {    const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo(); diff --git a/llvm/lib/CodeGen/VirtRegMap.h b/llvm/lib/CodeGen/VirtRegMap.h index 2e9c899baab..962c9dea3e9 100644 --- a/llvm/lib/CodeGen/VirtRegMap.h +++ b/llvm/lib/CodeGen/VirtRegMap.h @@ -430,6 +430,8 @@ namespace llvm {      /// the folded instruction map and spill point map.      void RemoveMachineInstrFromMaps(MachineInstr *MI); +    bool OnlyUseOfStackSlot(const MachineInstr *MI) const; +      void print(std::ostream &OS, const Module* M = 0) const;      void print(std::ostream *OS) const { if (OS) print(*OS); }      void dump() const; diff --git a/llvm/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp b/llvm/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp index d8a33957d5c..3bdcf88365f 100644 --- a/llvm/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp +++ b/llvm/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp @@ -238,12 +238,7 @@ bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {    for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();         I != E; ++I) {      // Print a label for the basic block. -    if (!VerboseAsm && (I->pred_empty() || I->isOnlyReachableByFallthrough())) { -      // This is an entry block or a block that's only reachable via a -      // fallthrough edge. In non-VerboseAsm mode, don't print the label. -      assert((I->pred_empty() || (*I->pred_begin())->isLayoutSuccessor(I)) && -             "Fall-through predecessor not adjacent to its successor!"); -    } else { +    if (!I->pred_empty()) {        printBasicBlockLabel(I, true, true, VerboseAsm);        O << '\n';      }  | 

