diff options
author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-25 21:22:12 +0000 |
---|---|---|
committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-25 21:22:12 +0000 |
commit | bec234c970d00169f762a3be3d592cc406e458ba (patch) | |
tree | 41dca5b82dab55f4d005effb9180bb64edcc3528 /llvm | |
parent | c0720a40526a634cac1e472cfdf0721732ad1857 (diff) | |
download | bcm5719-llvm-bec234c970d00169f762a3be3d592cc406e458ba.tar.gz bcm5719-llvm-bec234c970d00169f762a3be3d592cc406e458ba.zip |
[X86] Pull out repeated ScalarValueSizeInBits code. NFCI.
llvm-svn: 298783
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 02e39dadea7..fb432a000f0 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -26646,25 +26646,23 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op, unsigned X86TargetLowering::ComputeNumSignBitsForTargetNode( SDValue Op, const SelectionDAG &DAG, unsigned Depth) const { + unsigned VTBits = Op.getScalarValueSizeInBits(); unsigned Opcode = Op.getOpcode(); switch (Opcode) { case X86ISD::SETCC_CARRY: // SETCC_CARRY sets the dest to ~0 for true or 0 for false. - return Op.getScalarValueSizeInBits(); + return VTBits; case X86ISD::VSEXT: { SDValue Src = Op.getOperand(0); - EVT VT = Op.getValueType(); - EVT SrcVT = Src.getValueType(); unsigned Tmp = DAG.ComputeNumSignBits(Src, Depth + 1); - Tmp += VT.getScalarSizeInBits() - SrcVT.getScalarSizeInBits(); + Tmp += VTBits - Src.getScalarValueSizeInBits(); return Tmp; } case X86ISD::VSRAI: { SDValue Src = Op.getOperand(0); unsigned Tmp = DAG.ComputeNumSignBits(Src, Depth + 1); - unsigned VTBits = Op.getValueType().getScalarSizeInBits(); APInt ShiftVal = cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue(); ShiftVal += Tmp; return ShiftVal.uge(VTBits) ? VTBits : ShiftVal.getZExtValue(); @@ -26676,7 +26674,7 @@ unsigned X86TargetLowering::ComputeNumSignBitsForTargetNode( case X86ISD::VPCOM: case X86ISD::VPCOMU: // Vector compares return zero/all-bits result values. - return Op.getScalarValueSizeInBits(); + return VTBits; } // Fallback case. |