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| author | Sam Kolton <Sam.Kolton@amd.com> | 2016-09-19 10:20:55 +0000 |
|---|---|---|
| committer | Sam Kolton <Sam.Kolton@amd.com> | 2016-09-19 10:20:55 +0000 |
| commit | be7ffb90bf09ae293eacfdbf15ad946f9ab12ecb (patch) | |
| tree | f8a388e7c22f197407783f9813831edd98f30312 /llvm | |
| parent | c941252374b901333cb6e9c3fa0345890137e46e (diff) | |
| download | bcm5719-llvm-be7ffb90bf09ae293eacfdbf15ad946f9ab12ecb.tar.gz bcm5719-llvm-be7ffb90bf09ae293eacfdbf15ad946f9ab12ecb.zip | |
[AMDGPU] Fix s_branch with -1 offset
Summary:
In case s_branch instruction target is itself backend should emit offset -1 but instead it emit 0.
'''
label:
s_branch label // should emit [0xff,0xff,0x82,0xbf]
'''
Tom, Matt: why are we adjusting fixup values in applyFixup() method instead of processFixup()? processFixup() is calling adjustFixupValue() but does nothing with its result.
Reviewers: vpykhtin, artem.tamazov, tstellarAMD
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl
Differential Revision: https://reviews.llvm.org/D24671
llvm-svn: 281896
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/MC/AMDGPU/labels-branch.s | 7 |
2 files changed, 9 insertions, 5 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp index 2e02cbafd71..5b02b2848bf 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp @@ -133,24 +133,21 @@ void AMDGPUAsmBackend::processFixupValue(const MCAssembler &Asm, const MCValue &Target, uint64_t &Value, bool &IsResolved) { if (IsResolved) - (void)adjustFixupValue(Fixup, Value, &Asm.getContext()); - + Value = adjustFixupValue(Fixup, Value, &Asm.getContext()); } void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, uint64_t Value, bool IsPCRel) const { - unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); if (!Value) return; // Doesn't change encoding. - Value = adjustFixupValue(Fixup, Value, nullptr); - MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind()); // Shift the value into position. Value <<= Info.TargetOffset; + unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); uint32_t Offset = Fixup.getOffset(); assert(Offset + NumBytes <= DataSize && "Invalid fixup offset!"); diff --git a/llvm/test/MC/AMDGPU/labels-branch.s b/llvm/test/MC/AMDGPU/labels-branch.s index da6450f1387..b79335b1089 100644 --- a/llvm/test/MC/AMDGPU/labels-branch.s +++ b/llvm/test/MC/AMDGPU/labels-branch.s @@ -1,17 +1,24 @@ // RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI +// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj %s | llvm-objdump -disassemble -mcpu=fiji - | FileCheck %s --check-prefix=BIN loop_start: s_branch loop_start // VI: s_branch loop_start ; encoding: [A,A,0x82,0xbf] // VI-NEXT: ; fixup A - offset: 0, value: loop_start, kind: fixup_si_sopp_br +// BIN: loop_start: +// BIN-NEXT: BF82FFFF s_branch loop_end // VI: s_branch loop_end ; encoding: [A,A,0x82,0xbf] // VI-NEXT: ; fixup A - offset: 0, value: loop_end, kind: fixup_si_sopp_br +// BIN: BF820000 +// BIN: loop_end: loop_end: s_branch gds // VI: s_branch gds ; encoding: [A,A,0x82,0xbf] // VI-NEXT: ; fixup A - offset: 0, value: gds, kind: fixup_si_sopp_br +// BIN: BF820000 +// BIN: gds: gds: s_nop 0 |
