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| author | Diana Picus <diana.picus@linaro.org> | 2016-06-14 07:30:20 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2016-06-14 07:30:20 +0000 |
| commit | bae1d89e4513c35b58e26bce2380761de0fbdbe4 (patch) | |
| tree | 0a06e367b31d3160638aa643365065f331b324bf /llvm | |
| parent | 484bace21b76f2d44266c63cb828635da6bf51a6 (diff) | |
| download | bcm5719-llvm-bae1d89e4513c35b58e26bce2380761de0fbdbe4.tar.gz bcm5719-llvm-bae1d89e4513c35b58e26bce2380761de0fbdbe4.zip | |
[SelectionDAG] Remove exit-on-error flag from test (PR27765)
The exit-on-error flag in the ARM test is necessary in order to avoid an
unreachable in the DAGTypeLegalizer, when trying to expand a physical register.
We can also avoid this situation by introducing a bitcast early on, where the
invalid scalar-to-vector conversion is detected.
We also add a test for PowerPC, which goes through a similar code path in the
SelectionDAGBuilder.
Fixes PR27765.
Differential Revision: http://reviews.llvm.org/D21061
llvm-svn: 272644
Diffstat (limited to 'llvm')
3 files changed, 20 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 68952fe4f50..a4d05075ef7 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -445,9 +445,11 @@ static void getCopyToParts(SelectionDAG &DAG, const SDLoc &DL, SDValue Val, "Failed to tile the value with PartVT!"); if (NumParts == 1) { - if (PartEVT != ValueVT) + if (PartEVT != ValueVT) { diagnosePossiblyInvalidConstraint(*DAG.getContext(), V, "scalar-to-vector conversion failed"); + Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); + } Parts[0] = Val; return; diff --git a/llvm/test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv2.ll b/llvm/test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv2.ll index 170c09fc141..a928543d7cf 100644 --- a/llvm/test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv2.ll +++ b/llvm/test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv2.ll @@ -1,10 +1,11 @@ -; RUN: not llc -mtriple=arm-eabi -mcpu=cortex-a8 -exit-on-error %s -o - 2>&1 | FileCheck %s +; RUN: not llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - 2>&1 | FileCheck %s ; Check for error message: ; CHECK: scalar-to-vector conversion failed, possible invalid constraint for vector type +; CHECK: scalar-to-vector conversion failed, possible invalid constraint for vector type define hidden void @f(i32* %corr, i32 %order) nounwind ssp { - tail call void asm sideeffect "vst1.s32 { ${1:q}, ${2:q} }, [$0]", "r,{q0},{q1}"(i32* %corr, <2 x i64>* undef, <2 x i64>* undef) nounwind, !srcloc !0 + tail call void asm sideeffect "vst1.s32 { ${1:q}, ${2:q} }, [$0]", "r,{q0},{q1}"(i32* %corr, <2 x i64>* undef, i32 %order) nounwind, !srcloc !0 ret void } diff --git a/llvm/test/CodeGen/PowerPC/inline-asm-scalar-to-vector-error.ll b/llvm/test/CodeGen/PowerPC/inline-asm-scalar-to-vector-error.ll new file mode 100644 index 00000000000..3f1d9d32bec --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/inline-asm-scalar-to-vector-error.ll @@ -0,0 +1,14 @@ +; RUN: not llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8a -mattr=+altivec %s -o - 2>&1 | FileCheck %s + +define hidden void @f(i32 %x) { + ; CHECK: scalar-to-vector conversion failed, possible invalid constraint for vector type + tail call void asm sideeffect "nop", "{v1}"(i32 %x) nounwind + + ; CHECK: scalar-to-vector conversion failed, possible invalid constraint for vector type + tail call void asm sideeffect "nop", "{vsl1}"(i32 %x) nounwind + + ; CHECK: scalar-to-vector conversion failed, possible invalid constraint for vector type + tail call void asm sideeffect "nop", "{vsh1}"(i32 %x) nounwind + + ret void +} |
