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authorBob Wilson <bob.wilson@apple.com>2010-03-16 00:31:15 +0000
committerBob Wilson <bob.wilson@apple.com>2010-03-16 00:31:15 +0000
commitba75e816447f4927bda39f6ab03964a02ec6fea5 (patch)
tree210d5b6f49c6454c3a08e2013cc7a4e4f12ceecf /llvm
parentdb035a0af2ac5dfbefe952a874903b08d9b48152 (diff)
downloadbcm5719-llvm-ba75e816447f4927bda39f6ab03964a02ec6fea5.tar.gz
bcm5719-llvm-ba75e816447f4927bda39f6ab03964a02ec6fea5.zip
Wrap a long line and add some parens to be consistent.
llvm-svn: 98596
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 77dd4667615..8fbcf45dfd6 100644
--- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -243,8 +243,9 @@ ARMLoadStoreOpt::MergeOps(MachineBasicBlock &MBB,
BaseKill = true; // New base is always killed right its use.
}
- bool isDPR = Opcode == ARM::VLDRD || Opcode == ARM::VSTRD;
- bool isDef = isi32Load(Opcode) || Opcode == ARM::VLDRS || Opcode == ARM::VLDRD;
+ bool isDPR = (Opcode == ARM::VLDRD || Opcode == ARM::VSTRD);
+ bool isDef = (isi32Load(Opcode) || Opcode == ARM::VLDRS ||
+ Opcode == ARM::VLDRD);
Opcode = getLoadStoreMultipleOpcode(Opcode);
MachineInstrBuilder MIB = (isAM4)
? BuildMI(MBB, MBBI, dl, TII->get(Opcode))
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