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| author | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 19:23:04 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 19:23:04 +0000 |
| commit | b9845f5758c8a2f7083829334e549bf596e79b01 (patch) | |
| tree | c7b665eeb46be089cc518d07cade2fbe64aab240 /llvm | |
| parent | ec5a1e36699bba290b2ab45c937897ca282c7c69 (diff) | |
| download | bcm5719-llvm-b9845f5758c8a2f7083829334e549bf596e79b01.tar.gz bcm5719-llvm-b9845f5758c8a2f7083829334e549bf596e79b01.zip | |
Add ppc440 itin. entries for LdStSTD*
llvm-svn: 153844
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCSchedule440.td | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCSchedule440.td b/llvm/lib/Target/PowerPC/PPCSchedule440.td index 9921fc8b952..419faea3022 100644 --- a/llvm/lib/Target/PowerPC/PPCSchedule440.td +++ b/llvm/lib/Target/PowerPC/PPCSchedule440.td @@ -373,6 +373,26 @@ def PPC440Itineraries : ProcessorItineraries< InstrStage<1, [LWB]>], [8, 5], [NoBypass, GPR_Bypass]>, + InstrItinData<LdStSTD , [InstrStage<1, [IFTH1, IFTH2]>, + InstrStage<1, [PDCD1, PDCD2]>, + InstrStage<1, [DISS1, DISS2]>, + InstrStage<1, [LRACC]>, + InstrStage<1, [AGEN]>, + InstrStage<1, [CRD]>, + InstrStage<2, [LWB]>], + [8, 5], + [NoBypass, GPR_Bypass]>, + InstrItinData<LdStSTDCX , [InstrStage<1, [IFTH1, IFTH2]>, + InstrStage<1, [PDCD1, PDCD2]>, + InstrStage<1, [DISS1]>, + InstrStage<1, [IRACC], 0>, + InstrStage<4, [LWARX_Hold], 0>, + InstrStage<1, [LRACC]>, + InstrStage<1, [AGEN]>, + InstrStage<1, [CRD]>, + InstrStage<1, [LWB]>], + [8, 5], + [NoBypass, GPR_Bypass]>, InstrItinData<LdStSTWCX , [InstrStage<1, [IFTH1, IFTH2]>, InstrStage<1, [PDCD1, PDCD2]>, InstrStage<1, [DISS1]>, |
