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authorQuentin Colombet <qcolombet@apple.com>2016-02-02 20:11:17 +0000
committerQuentin Colombet <qcolombet@apple.com>2016-02-02 20:11:17 +0000
commitb8fb2ba1bb3116d7cf84c3e317968377a690d35a (patch)
treeababc9be7a0728f6b9a65196ced3cf866dbe3838 /llvm
parent1377fd6781744d5acab9f060c87c22824153cf32 (diff)
downloadbcm5719-llvm-b8fb2ba1bb3116d7cf84c3e317968377a690d35a.tar.gz
bcm5719-llvm-b8fb2ba1bb3116d7cf84c3e317968377a690d35a.zip
[X86] Fix the merging of SP updates in prologue/epilogue insertions.
When the merging was involving LEAs, we were taking the wrong immediate from the list of operands. rdar://problem/24446069 llvm-svn: 259553
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/X86/X86FrameLowering.cpp9
-rw-r--r--llvm/test/CodeGen/X86/merge-sp-update-lea.ll32
2 files changed, 39 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index a6d395b92a0..c394383dce0 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -376,12 +376,17 @@ int X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,
int Offset = 0;
if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
- Opc == X86::ADD32ri || Opc == X86::ADD32ri8 ||
- Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
+ Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
PI->getOperand(0).getReg() == StackPtr){
Offset += PI->getOperand(2).getImm();
MBB.erase(PI);
if (!doMergeWithPrevious) MBBI = NI;
+ } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
+ PI->getOperand(0).getReg() == StackPtr) {
+ // For LEAs we have: def = lea SP, FI, noreg, Offset, noreg.
+ Offset += PI->getOperand(4).getImm();
+ MBB.erase(PI);
+ if (!doMergeWithPrevious) MBBI = NI;
} else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
PI->getOperand(0).getReg() == StackPtr) {
diff --git a/llvm/test/CodeGen/X86/merge-sp-update-lea.ll b/llvm/test/CodeGen/X86/merge-sp-update-lea.ll
new file mode 100644
index 00000000000..cd2be44e1c0
--- /dev/null
+++ b/llvm/test/CodeGen/X86/merge-sp-update-lea.ll
@@ -0,0 +1,32 @@
+; RUN: llc %s -o - | FileCheck %s
+target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
+target triple = "i386-apple-macosx"
+
+; Check that the merging of SP updates, when LEAs are involved, happen
+; correctly.
+; CHECK-LABEL: useLEA:
+; CHECK: calll L_realloc
+; Make sure that the offset we get here is 8 + 16.
+; We used to have 8 + 1 because we were not reading the right immediate form
+; the LEA instruction.
+; CHECK-NEXT: leal 24(%esp), %esp
+define noalias i8* @useLEA(i8* nocapture %p, i32 %nbytes) #0 {
+entry:
+ %cmp = icmp slt i32 %nbytes, 0
+ br i1 %cmp, label %cond.end.3, label %cond.false
+
+cond.false: ; preds = %entry
+ %tobool = icmp ne i32 %nbytes, 0
+ %cond = select i1 %tobool, i32 %nbytes, i32 1
+ %call = tail call i8* @realloc(i8* %p, i32 %cond)
+ br label %cond.end.3
+
+cond.end.3: ; preds = %entry, %cond.false
+ %cond4 = phi i8* [ %call, %cond.false ], [ null, %entry ]
+ ret i8* %cond4
+}
+
+; Function Attrs: nounwind optsize
+declare noalias i8* @realloc(i8* nocapture, i32)
+
+attributes #0 = { nounwind optsize ssp "disable-tail-calls"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "target-features"="+lea-sp" }
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