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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-04-10 16:58:07 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-04-10 16:58:07 +0000 |
| commit | b6702eaec3bc0cbf16450829f832f4ba4cc73b04 (patch) | |
| tree | 9effdc478b83cc18ab9020f3129d73b55fa49ab6 /llvm | |
| parent | 570e35c1570a21d98f8fce9378bfdbc36482968a (diff) | |
| download | bcm5719-llvm-b6702eaec3bc0cbf16450829f832f4ba4cc73b04.tar.gz bcm5719-llvm-b6702eaec3bc0cbf16450829f832f4ba4cc73b04.zip | |
[X86][MMX] Add fast-isel support for MMX non-temporal writes
Differential Revision: https://reviews.llvm.org/D31754
llvm-svn: 299852
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86FastISel.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/fast-isel-nontemporal.ll | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index f225696afe2..e82f43c1e0e 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -528,6 +528,7 @@ bool X86FastISel::X86FastEmitLoad(EVT VT, X86AddressMode &AM, bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill, X86AddressMode &AM, MachineMemOperand *MMO, bool Aligned) { + bool HasSSE1 = Subtarget->hasSSE1(); bool HasSSE2 = Subtarget->hasSSE2(); bool HasSSE4A = Subtarget->hasSSE4A(); bool HasAVX = Subtarget->hasAVX(); @@ -588,6 +589,9 @@ bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill, } else Opc = X86::ST_Fp64m; break; + case MVT::x86mmx: + Opc = (IsNonTemporal && HasSSE1) ? X86::MMX_MOVNTQmr : X86::MMX_MOVQ64mr; + break; case MVT::v4f32: if (Aligned) { if (IsNonTemporal) diff --git a/llvm/test/CodeGen/X86/fast-isel-nontemporal.ll b/llvm/test/CodeGen/X86/fast-isel-nontemporal.ll index e7c3d930e46..4140721bd5f 100644 --- a/llvm/test/CodeGen/X86/fast-isel-nontemporal.ll +++ b/llvm/test/CodeGen/X86/fast-isel-nontemporal.ll @@ -100,7 +100,7 @@ define void @test_mmx(x86_mmx* nocapture %a0, x86_mmx* nocapture %a1) { ; ALL: # BB#0: # %entry ; ALL-NEXT: movq (%rdi), %mm0 ; ALL-NEXT: psrlq $3, %mm0 -; ALL-NEXT: movq %mm0, (%rsi) +; ALL-NEXT: movntq %mm0, (%rsi) ; ALL-NEXT: retq entry: %0 = load x86_mmx, x86_mmx* %a0 |
