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| author | Chris Lattner <sabre@nondot.org> | 2006-01-29 06:25:22 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-01-29 06:25:22 +0000 |
| commit | b5f0ba6051cdcfef886b7eadeee0015c0747a8f9 (patch) | |
| tree | 7d166ffdfe044348b13abd6c76183f40373ec36b /llvm | |
| parent | 9b60714b2a8c29bace1c8533defceb750d081350 (diff) | |
| download | bcm5719-llvm-b5f0ba6051cdcfef886b7eadeee0015c0747a8f9.tar.gz bcm5719-llvm-b5f0ba6051cdcfef886b7eadeee0015c0747a8f9.zip | |
Update alpha to reflect recent constantfp legalize changes. It's not clear
why all this code isn't autogenerated. :(
llvm-svn: 25770
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp | 32 | ||||
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelLowering.cpp | 2 |
2 files changed, 18 insertions, 16 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index 2b83f39bb47..8405b26ab39 100644 --- a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -237,23 +237,23 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) { return CurDAG->SelectNodeTo(N, Alpha::LDQr, MVT::i64, MVT::Other, CPI, Tmp, CurDAG->getEntryNode()); } - case ISD::ConstantFP: - if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N)) { - bool isDouble = N->getValueType(0) == MVT::f64; - MVT::ValueType T = isDouble ? MVT::f64 : MVT::f32; - if (CN->isExactlyValue(+0.0)) { - return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYST : Alpha::CPYSS, - T, CurDAG->getRegister(Alpha::F31, T), - CurDAG->getRegister(Alpha::F31, T)); - } else if ( CN->isExactlyValue(-0.0)) { - return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYSNT : Alpha::CPYSNS, - T, CurDAG->getRegister(Alpha::F31, T), - CurDAG->getRegister(Alpha::F31, T)); - } else { - abort(); - } - break; + case ISD::TargetConstantFP: { + ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N); + bool isDouble = N->getValueType(0) == MVT::f64; + MVT::ValueType T = isDouble ? MVT::f64 : MVT::f32; + if (CN->isExactlyValue(+0.0)) { + return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYST : Alpha::CPYSS, + T, CurDAG->getRegister(Alpha::F31, T), + CurDAG->getRegister(Alpha::F31, T)); + } else if ( CN->isExactlyValue(-0.0)) { + return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYSNT : Alpha::CPYSNS, + T, CurDAG->getRegister(Alpha::F31, T), + CurDAG->getRegister(Alpha::F31, T)); + } else { + abort(); } + break; + } case ISD::SETCC: if (MVT::isFloatingPoint(N->getOperand(0).Val->getValueType(0))) { diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp index 6779b90bd3a..517ffaeab6a 100644 --- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp @@ -145,6 +145,8 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM) setStackPointerRegisterToSaveRestore(Alpha::R30); + setOperationAction(ISD::ConstantFP, MVT::f64, Expand); + setOperationAction(ISD::ConstantFP, MVT::f32, Expand); addLegalFPImmediate(+0.0); //F31 addLegalFPImmediate(-0.0); //-F31 |
