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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-15 21:08:54 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-15 21:08:54 +0000 |
commit | b5dff9ab50d2011ada8ec549755fb34a1a1fb63e (patch) | |
tree | b778fe7f9c0ae5049a29791325b1bff4f27c6adc /llvm | |
parent | 14d4645e46141fdc7b88a32ef355d521c9b6c405 (diff) | |
download | bcm5719-llvm-b5dff9ab50d2011ada8ec549755fb34a1a1fb63e.tar.gz bcm5719-llvm-b5dff9ab50d2011ada8ec549755fb34a1a1fb63e.zip |
R600: Fix assert on vector sdiv
llvm-svn: 211000
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 8 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/sdiv.ll | 32 |
2 files changed, 36 insertions, 4 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index a7e86c9cbed..6a3ef750a28 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -1321,15 +1321,15 @@ SDValue AMDGPUTargetLowering::LowerSDIV32(SDValue Op, SelectionDAG &DAG) const { // ilt r10, r0, 0 SDValue r10 = DAG.getSelectCC(DL, r0, DAG.getConstant(0, OVT), - DAG.getConstant(-1, MVT::i32), - DAG.getConstant(0, MVT::i32), + DAG.getConstant(-1, OVT), + DAG.getConstant(0, OVT), ISD::SETLT); // ilt r11, r1, 0 SDValue r11 = DAG.getSelectCC(DL, r1, DAG.getConstant(0, OVT), - DAG.getConstant(-1, MVT::i32), - DAG.getConstant(0, MVT::i32), + DAG.getConstant(-1, OVT), + DAG.getConstant(0, OVT), ISD::SETLT); // iadd r0, r0, r10 diff --git a/llvm/test/CodeGen/R600/sdiv.ll b/llvm/test/CodeGen/R600/sdiv.ll index f6261af3b3c..e922d5c1868 100644 --- a/llvm/test/CodeGen/R600/sdiv.ll +++ b/llvm/test/CodeGen/R600/sdiv.ll @@ -49,6 +49,38 @@ define void @slow_sdiv_i32_3435(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { ret void } +define void @sdiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { + %den_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1 + %num = load <2 x i32> addrspace(1) * %in + %den = load <2 x i32> addrspace(1) * %den_ptr + %result = sdiv <2 x i32> %num, %den + store <2 x i32> %result, <2 x i32> addrspace(1)* %out + ret void +} + +define void @sdiv_v2i32_4(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { + %num = load <2 x i32> addrspace(1) * %in + %result = sdiv <2 x i32> %num, <i32 4, i32 4> + store <2 x i32> %result, <2 x i32> addrspace(1)* %out + ret void +} + +define void @sdiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { + %den_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1 + %num = load <4 x i32> addrspace(1) * %in + %den = load <4 x i32> addrspace(1) * %den_ptr + %result = sdiv <4 x i32> %num, %den + store <4 x i32> %result, <4 x i32> addrspace(1)* %out + ret void +} + +define void @sdiv_v4i32_4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { + %num = load <4 x i32> addrspace(1) * %in + %result = sdiv <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4> + store <4 x i32> %result, <4 x i32> addrspace(1)* %out + ret void +} + ; Tests for 64-bit divide bypass. ; define void @test_get_quotient(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind { ; %result = sdiv i64 %a, %b |