diff options
| author | Jia Liu <proljc@gmail.com> | 2012-02-18 12:03:15 +0000 |
|---|---|---|
| committer | Jia Liu <proljc@gmail.com> | 2012-02-18 12:03:15 +0000 |
| commit | b22310fda63e03a80c808de5e0510339668820ea (patch) | |
| tree | 18c810d3237dd8fdb79c60ab38e2415632d92f22 /llvm | |
| parent | 26538e8cc5d4aec1daf6243a1729fe2e99d73447 (diff) | |
| download | bcm5719-llvm-b22310fda63e03a80c808de5e0510339668820ea.tar.gz bcm5719-llvm-b22310fda63e03a80c808de5e0510339668820ea.zip | |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
llvm-svn: 150878
Diffstat (limited to 'llvm')
293 files changed, 385 insertions, 384 deletions
diff --git a/llvm/lib/Target/ARM/ARM.h b/llvm/lib/Target/ARM/ARM.h index 16d0da3b8ac..da3b74a1a0c 100644 --- a/llvm/lib/Target/ARM/ARM.h +++ b/llvm/lib/Target/ARM/ARM.h @@ -1,4 +1,4 @@ -//===-- ARM.h - Top-level interface for ARM representation---- --*- C++ -*-===// +//===-- ARM.h - Top-level interface for ARM representation-------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index dd9c4bd793e..076424e9e94 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -1,4 +1,4 @@ -//===- ARM.td - Describe the ARM Target Machine ------------*- tablegen -*-===// +//===-- ARM.td - Describe the ARM Target Machine -----------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.h b/llvm/lib/Target/ARM/ARMAsmPrinter.h index dcf693ce19f..4b276c5b716 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.h +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.h @@ -1,4 +1,4 @@ -//===-- ARMAsmPrinter.h - Print machine code to an ARM .s file ------------===// +//===-- ARMAsmPrinter.h - Print machine code to an ARM .s file --*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 3a44c6a407a..8f0170ce789 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- ARMBaseInstrInfo.cpp - ARM Instruction Information -------*- C++ -*-===// +//===-- ARMBaseInstrInfo.cpp - ARM Instruction Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h index 68e8208eedd..8899c9a8331 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h @@ -1,4 +1,4 @@ -//===- ARMBaseInstrInfo.h - ARM Base Instruction Information ----*- C++ -*-===// +//===-- ARMBaseInstrInfo.h - ARM Base Instruction Information ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 9c8486c9bcd..88662a92038 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- ARMBaseRegisterInfo.cpp - ARM Register Information -------*- C++ -*-===// +//===-- ARMBaseRegisterInfo.cpp - ARM Register Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h index 534f624c54f..4238ca8b272 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h @@ -1,4 +1,4 @@ -//===- ARMBaseRegisterInfo.h - ARM Register Information Impl ----*- C++ -*-===// +//===-- ARMBaseRegisterInfo.h - ARM Register Information Impl ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMBuildAttrs.h b/llvm/lib/Target/ARM/ARMBuildAttrs.h index 69eddf03ec9..11bd6a4a8db 100644 --- a/llvm/lib/Target/ARM/ARMBuildAttrs.h +++ b/llvm/lib/Target/ARM/ARMBuildAttrs.h @@ -1,4 +1,4 @@ -//===-------- ARMBuildAttrs.h - ARM Build Attributes ------------*- C++ -*-===// +//===-- ARMBuildAttrs.h - ARM Build Attributes ------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMCallingConv.h b/llvm/lib/Target/ARM/ARMCallingConv.h index ff7db1ff62e..437b4c73d1c 100644 --- a/llvm/lib/Target/ARM/ARMCallingConv.h +++ b/llvm/lib/Target/ARM/ARMCallingConv.h @@ -1,4 +1,4 @@ -//===-- ARMCallingConv.h - ARM Custom Calling Convention Routines ---------===// +//=== ARMCallingConv.h - ARM Custom Calling Convention Routines -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMCallingConv.td b/llvm/lib/Target/ARM/ARMCallingConv.td index ea491dc6809..d33364bb287 100644 --- a/llvm/lib/Target/ARM/ARMCallingConv.td +++ b/llvm/lib/Target/ARM/ARMCallingConv.td @@ -1,4 +1,4 @@ -//===- ARMCallingConv.td - Calling Conventions for ARM -----*- tablegen -*-===// +//===-- ARMCallingConv.td - Calling Conventions for ARM ----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp b/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp index 5a830ca2022..fa3226e37eb 100644 --- a/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp +++ b/llvm/lib/Target/ARM/ARMConstantPoolValue.cpp @@ -1,4 +1,4 @@ -//===- ARMConstantPoolValue.cpp - ARM constantpool value --------*- C++ -*-===// +//===-- ARMConstantPoolValue.cpp - ARM constantpool value -----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMConstantPoolValue.h b/llvm/lib/Target/ARM/ARMConstantPoolValue.h index 0d0def32b7d..6b98d446b00 100644 --- a/llvm/lib/Target/ARM/ARMConstantPoolValue.h +++ b/llvm/lib/Target/ARM/ARMConstantPoolValue.h @@ -1,4 +1,4 @@ -//===- ARMConstantPoolValue.h - ARM constantpool value ----------*- C++ -*-===// +//===-- ARMConstantPoolValue.h - ARM constantpool value ---------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp index 180adb006a2..7fbf7d5bc77 100644 --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -1,4 +1,4 @@ -//===-- ARMExpandPseudoInsts.cpp - Expand pseudo instructions -----*- C++ -*-=// +//===-- ARMExpandPseudoInsts.cpp - Expand pseudo instructions -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp index 5f54d49835b..96b987abc85 100644 --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -1,4 +1,4 @@ -//=======- ARMFrameLowering.cpp - ARM Frame Information --------*- C++ -*-====// +//===-- ARMFrameLowering.cpp - ARM Frame Information ----------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMInstrFormats.td b/llvm/lib/Target/ARM/ARMInstrFormats.td index 81229f47790..1d38bcf9e84 100644 --- a/llvm/lib/Target/ARM/ARMInstrFormats.td +++ b/llvm/lib/Target/ARM/ARMInstrFormats.td @@ -1,4 +1,4 @@ -//===- ARMInstrFormats.td - ARM Instruction Formats ----------*- tablegen -*-=// +//===-- ARMInstrFormats.td - ARM Instruction Formats -------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.cpp b/llvm/lib/Target/ARM/ARMInstrInfo.cpp index 48da03f63bb..e4d46d19ef5 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- ARMInstrInfo.cpp - ARM Instruction Information -----------*- C++ -*-===// +//===-- ARMInstrInfo.cpp - ARM Instruction Information --------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.h b/llvm/lib/Target/ARM/ARMInstrInfo.h index f2c7bdc31be..3a69692326d 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.h +++ b/llvm/lib/Target/ARM/ARMInstrInfo.h @@ -1,4 +1,4 @@ -//===- ARMInstrInfo.h - ARM Instruction Information -------------*- C++ -*-===// +//===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMInstrNEON.td b/llvm/lib/Target/ARM/ARMInstrNEON.td index a7171723831..154fb25cec9 100644 --- a/llvm/lib/Target/ARM/ARMInstrNEON.td +++ b/llvm/lib/Target/ARM/ARMInstrNEON.td @@ -1,4 +1,4 @@ -//===- ARMInstrNEON.td - NEON support for ARM -----------------------------===// +//===-- ARMInstrNEON.td - NEON support for ARM -------------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td index 9bbf8e60320..9019e8cd803 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb.td @@ -1,4 +1,4 @@ -//===- ARMInstrThumb.td - Thumb support for ARM ------------*- tablegen -*-===// +//===-- ARMInstrThumb.td - Thumb support for ARM -----------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index 638b37a0004..c15cbbedbff 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -1,4 +1,4 @@ -//===- ARMInstrThumb2.td - Thumb2 support for ARM -------------------------===// +//===-- ARMInstrThumb2.td - Thumb2 support for ARM ---------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMInstrVFP.td b/llvm/lib/Target/ARM/ARMInstrVFP.td index 1c07394f398..bf32b49640f 100644 --- a/llvm/lib/Target/ARM/ARMInstrVFP.td +++ b/llvm/lib/Target/ARM/ARMInstrVFP.td @@ -1,4 +1,4 @@ -//===- ARMInstrVFP.td - VFP support for ARM ----------------*- tablegen -*-===// +//===-- ARMInstrVFP.td - VFP support for ARM ---------------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMJITInfo.h b/llvm/lib/Target/ARM/ARMJITInfo.h index 2f9792813d3..79281844272 100644 --- a/llvm/lib/Target/ARM/ARMJITInfo.h +++ b/llvm/lib/Target/ARM/ARMJITInfo.h @@ -1,4 +1,4 @@ -//===- ARMJITInfo.h - ARM implementation of the JIT interface --*- C++ -*-===// +//===-- ARMJITInfo.h - ARM implementation of the JIT interface -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index cf789f9431e..0f6dc0479e0 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1,4 +1,4 @@ -//===-- ARMLoadStoreOptimizer.cpp - ARM load / store opt. pass ----*- C++ -*-=// +//===-- ARMLoadStoreOptimizer.cpp - ARM load / store opt. pass ------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp index a770bc5a02f..af445e2f35a 100644 --- a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp +++ b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp @@ -1,4 +1,4 @@ -//====- ARMMachineFuctionInfo.cpp - ARM machine function info ---*- C++ -*-===// +//===-- ARMMachineFuctionInfo.cpp - ARM machine function info -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h index 1e9da863875..f1c8fc84816 100644 --- a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h +++ b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h @@ -1,4 +1,4 @@ -//====- ARMMachineFuctionInfo.h - ARM machine function info -----*- C++ -*-===// +//===-- ARMMachineFuctionInfo.h - ARM machine function info -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMPerfectShuffle.h b/llvm/lib/Target/ARM/ARMPerfectShuffle.h index 18e16200060..efa22fbed9f 100644 --- a/llvm/lib/Target/ARM/ARMPerfectShuffle.h +++ b/llvm/lib/Target/ARM/ARMPerfectShuffle.h @@ -1,4 +1,4 @@ -//===-- ARMPerfectShuffle.h - NEON Perfect Shuffle Table ------------------===// +//===-- ARMPerfectShuffle.h - NEON Perfect Shuffle Table --------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp index d6921bb83c5..1f83762d06c 100644 --- a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- ARMRegisterInfo.cpp - ARM Register Information -----------*- C++ -*-===// +//===-- ARMRegisterInfo.cpp - ARM Register Information --------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.h b/llvm/lib/Target/ARM/ARMRegisterInfo.h index 15afc1aadab..65ed95d1cd1 100644 --- a/llvm/lib/Target/ARM/ARMRegisterInfo.h +++ b/llvm/lib/Target/ARM/ARMRegisterInfo.h @@ -1,4 +1,4 @@ -//===- ARMRegisterInfo.h - ARM Register Information Impl --------*- C++ -*-===// +//===-- ARMRegisterInfo.h - ARM Register Information Impl -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.td b/llvm/lib/Target/ARM/ARMRegisterInfo.td index 523e4f6d41d..16998b2d7b4 100644 --- a/llvm/lib/Target/ARM/ARMRegisterInfo.td +++ b/llvm/lib/Target/ARM/ARMRegisterInfo.td @@ -1,4 +1,4 @@ -//===- ARMRegisterInfo.td - ARM Register defs --------------*- tablegen -*-===// +//===-- ARMRegisterInfo.td - ARM Register defs -------------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMRelocations.h b/llvm/lib/Target/ARM/ARMRelocations.h index 86e7206f2cc..21877fd9af3 100644 --- a/llvm/lib/Target/ARM/ARMRelocations.h +++ b/llvm/lib/Target/ARM/ARMRelocations.h @@ -1,4 +1,4 @@ -//===- ARMRelocations.h - ARM Code Relocations ------------------*- C++ -*-===// +//===-- ARMRelocations.h - ARM Code Relocations -----------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMSchedule.td b/llvm/lib/Target/ARM/ARMSchedule.td index 86caa403f9b..45486fd0b6d 100644 --- a/llvm/lib/Target/ARM/ARMSchedule.td +++ b/llvm/lib/Target/ARM/ARMSchedule.td @@ -1,10 +1,10 @@ -//===- ARMSchedule.td - ARM Scheduling Definitions ---------*- tablegen -*-===// -// +//===-- ARMSchedule.td - ARM Scheduling Definitions --------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/ARM/ARMScheduleV6.td b/llvm/lib/Target/ARM/ARMScheduleV6.td index c1880a72fff..4d959f565e0 100644 --- a/llvm/lib/Target/ARM/ARMScheduleV6.td +++ b/llvm/lib/Target/ARM/ARMScheduleV6.td @@ -1,10 +1,10 @@ -//===- ARMScheduleV6.td - ARM v6 Scheduling Definitions ----*- tablegen -*-===// -// +//===-- ARMScheduleV6.td - ARM v6 Scheduling Definitions ---*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines the itinerary class data for the ARM v6 processors. diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp index bb77a3c48ca..3609cb4f0df 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.cpp +++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp @@ -1,4 +1,4 @@ -//===-- ARMSubtarget.cpp - ARM Subtarget Information ------------*- C++ -*-===// +//===-- ARMSubtarget.cpp - ARM Subtarget Information ----------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index b6c40d32cf2..58ff8fb5fd3 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -1,4 +1,4 @@ -//=====---- ARMSubtarget.h - Define Subtarget for the ARM -----*- C++ -*--====// +//===-- ARMSubtarget.h - Define Subtarget for the ARM ----------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 77974baf599..0ccb4ee5a2a 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -1,4 +1,4 @@ -//===- ARMDisassembler.cpp - Disassembler for ARM/Thumb ISA -----*- C++ -*-===// +//===-- ARMDisassembler.cpp - Disassembler for ARM/Thumb ISA --------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h index f63157f6df0..c943c9c2a32 100644 --- a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h +++ b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h @@ -1,4 +1,4 @@ -//===-- ARMInstPrinter.h - Convert ARM MCInst to assembly syntax ----------===// +//===- ARMInstPrinter.h - Convert ARM MCInst to assembly syntax -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h index 6d660c512e1..62473b2bfde 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h @@ -1,4 +1,4 @@ -//===- ARMAddressingModes.h - ARM Addressing Modes --------------*- C++ -*-===// +//===-- ARMAddressingModes.h - ARM Addressing Modes -------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp index d1804a2e45b..03e8d5f83ae 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp @@ -1,4 +1,4 @@ -//===-- ARMMCAsmInfo.cpp - ARM asm properties -------------------*- C++ -*-===// +//===-- ARMMCAsmInfo.cpp - ARM asm properties -----------------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h index e240f4ee184..f0b289c6f3b 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h @@ -1,4 +1,4 @@ -//=====-- ARMMCAsmInfo.h - ARM asm properties -------------*- C++ -*--====// +//===-- ARMMCAsmInfo.h - ARM asm properties --------------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h index 0a2e883deb1..a727e087d29 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h @@ -1,4 +1,4 @@ -//===-- ARMMCExpr.h - ARM specific MC expression classes ------------------===// +//===-- ARMMCExpr.h - ARM specific MC expression classes --------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp index e86f48e309c..89aa68f3056 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- ARMMCTargetDesc.cpp - ARM Target Descriptions -----------*- C++ -*-===// +//===-- ARMMCTargetDesc.cpp - ARM Target Descriptions ---------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/MLxExpansionPass.cpp b/llvm/lib/Target/ARM/MLxExpansionPass.cpp index 000a37fcf7a..28998361c7a 100644 --- a/llvm/lib/Target/ARM/MLxExpansionPass.cpp +++ b/llvm/lib/Target/ARM/MLxExpansionPass.cpp @@ -1,4 +1,4 @@ -//===-- MLxExpansionPass.cpp - Expand MLx instrs to avoid hazards ----------=// +//===-- MLxExpansionPass.cpp - Expand MLx instrs to avoid hazards ---------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp index bb327b0bb78..75ea115e5f0 100644 --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp @@ -1,4 +1,4 @@ -//======- Thumb1FrameLowering.cpp - Thumb1 Frame Information ---*- C++ -*-====// +//===-- Thumb1FrameLowering.cpp - Thumb1 Frame Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp b/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp index de33bd6e801..ba16db34bd0 100644 --- a/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp @@ -1,4 +1,4 @@ -//===- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information ----*- C++ -*-===// +//===-- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/Thumb1InstrInfo.h b/llvm/lib/Target/ARM/Thumb1InstrInfo.h index 17ef2f758ef..4479101f2e6 100644 --- a/llvm/lib/Target/ARM/Thumb1InstrInfo.h +++ b/llvm/lib/Target/ARM/Thumb1InstrInfo.h @@ -1,4 +1,4 @@ -//===- Thumb1InstrInfo.h - Thumb-1 Instruction Information ------*- C++ -*-===// +//===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp index 9c2f2c58575..87e27bd0a13 100644 --- a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- Thumb1RegisterInfo.cpp - Thumb-1 Register Information ----*- C++ -*-===// +//===-- Thumb1RegisterInfo.cpp - Thumb-1 Register Information -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp index b13ab216c3d..8feacabc9eb 100644 --- a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp +++ b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp @@ -1,4 +1,4 @@ -//===-- Thumb2ITBlockPass.cpp - Insert Thumb IT blocks ----------*- C++ -*-===// +//===-- Thumb2ITBlockPass.cpp - Insert Thumb-2 IT blocks ------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp index dcf5308c627..8a6276be514 100644 --- a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -1,4 +1,4 @@ -//===- Thumb2InstrInfo.cpp - Thumb-2 Instruction Information ----*- C++ -*-===// +//===-- Thumb2InstrInfo.cpp - Thumb-2 Instruction Information -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/Thumb2InstrInfo.h b/llvm/lib/Target/ARM/Thumb2InstrInfo.h index f2637d7fbca..447949c7be3 100644 --- a/llvm/lib/Target/ARM/Thumb2InstrInfo.h +++ b/llvm/lib/Target/ARM/Thumb2InstrInfo.h @@ -1,4 +1,4 @@ -//===- Thumb2InstrInfo.h - Thumb-2 Instruction Information ------*- C++ -*-===// +//===-- Thumb2InstrInfo.h - Thumb-2 Instruction Information -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp b/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp index 355c3bf0352..6d210febc4b 100644 --- a/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- Thumb2RegisterInfo.cpp - Thumb-2 Register Information ----*- C++ -*-===// +//===-- Thumb2RegisterInfo.cpp - Thumb-2 Register Information -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/CellSDKIntrinsics.td b/llvm/lib/Target/CellSPU/CellSDKIntrinsics.td index 9468aee067a..cdb4099ffbc 100644 --- a/llvm/lib/Target/CellSPU/CellSDKIntrinsics.td +++ b/llvm/lib/Target/CellSPU/CellSDKIntrinsics.td @@ -1,5 +1,5 @@ //===-- CellSDKIntrinsics.td - Cell SDK Intrinsics ---------*- tablegen -*-===// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source diff --git a/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp b/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp index 0d36498fdad..8450e2c6634 100644 --- a/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp +++ b/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- SPUMCTargetDesc.cpp - Cell SPU Target Descriptions -----*- C++ -*-===// +//===-- SPUMCTargetDesc.cpp - Cell SPU Target Descriptions ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPU.h b/llvm/lib/Target/CellSPU/SPU.h index b51fbc7a519..c660131706c 100644 --- a/llvm/lib/Target/CellSPU/SPU.h +++ b/llvm/lib/Target/CellSPU/SPU.h @@ -1,4 +1,4 @@ -//===-- SPU.h - Top-level interface for Cell SPU Target ----------*- C++ -*-==// +//===-- SPU.h - Top-level interface for Cell SPU Target ---------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPU.td b/llvm/lib/Target/CellSPU/SPU.td index 8327fe03d7f..e835b9cac8e 100644 --- a/llvm/lib/Target/CellSPU/SPU.td +++ b/llvm/lib/Target/CellSPU/SPU.td @@ -1,5 +1,5 @@ -//===- SPU.td - Describe the STI Cell SPU Target Machine ----*- tablegen -*-===// -// +//===-- SPU.td - Describe the STI Cell SPU Target Machine --*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source diff --git a/llvm/lib/Target/CellSPU/SPU128InstrInfo.td b/llvm/lib/Target/CellSPU/SPU128InstrInfo.td index 3031fda5438..e051e047333 100644 --- a/llvm/lib/Target/CellSPU/SPU128InstrInfo.td +++ b/llvm/lib/Target/CellSPU/SPU128InstrInfo.td @@ -1,9 +1,9 @@ -//===--- SPU128InstrInfo.td - Cell SPU 128-bit operations -*- tablegen -*--===// +//===-- SPU128InstrInfo.td - Cell SPU 128-bit operations --*- tablegen -*--===// // // Cell SPU 128-bit operations // //===----------------------------------------------------------------------===// - + // zext 32->128: Zero extend 32-bit to 128-bit def : Pat<(i128 (zext R32C:$rSrc)), (ROTQMBYIr128_zext_r32 R32C:$rSrc, 12)>; diff --git a/llvm/lib/Target/CellSPU/SPU64InstrInfo.td b/llvm/lib/Target/CellSPU/SPU64InstrInfo.td index f340edfb0f8..bea33b5362d 100644 --- a/llvm/lib/Target/CellSPU/SPU64InstrInfo.td +++ b/llvm/lib/Target/CellSPU/SPU64InstrInfo.td @@ -1,4 +1,4 @@ -//====--- SPU64InstrInfo.td - Cell SPU 64-bit operations -*- tablegen -*--====// +//====-- SPU64InstrInfo.td - Cell SPU 64-bit operations ---*- tablegen -*--===// // // Cell SPU 64-bit operations // diff --git a/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp b/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp index f232ec7f786..14021fef05d 100644 --- a/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp +++ b/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp @@ -1,4 +1,4 @@ -//===-- SPUAsmPrinter.cpp - Print machine instrs to Cell SPU assembly -------=// +//===-- SPUAsmPrinter.cpp - Print machine instrs to Cell SPU assembly -----===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPUCallingConv.td b/llvm/lib/Target/CellSPU/SPUCallingConv.td index 04fa2ae866d..9f9692bf67f 100644 --- a/llvm/lib/Target/CellSPU/SPUCallingConv.td +++ b/llvm/lib/Target/CellSPU/SPUCallingConv.td @@ -1,10 +1,10 @@ //===- SPUCallingConv.td - Calling Conventions for CellSPU -*- tablegen -*-===// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This describes the calling conventions for the STI Cell SPU architecture. diff --git a/llvm/lib/Target/CellSPU/SPUFrameLowering.h b/llvm/lib/Target/CellSPU/SPUFrameLowering.h index b837f2cf94e..11c52818dd9 100644 --- a/llvm/lib/Target/CellSPU/SPUFrameLowering.h +++ b/llvm/lib/Target/CellSPU/SPUFrameLowering.h @@ -1,4 +1,4 @@ -//=====-- SPUFrameLowering.h - SPU Frame Lowering stuff -*- C++ -*----========// +//===-- SPUFrameLowering.h - SPU Frame Lowering stuff ----------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPUInstrBuilder.h b/llvm/lib/Target/CellSPU/SPUInstrBuilder.h index 5e268f8767c..b495537fc2c 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrBuilder.h +++ b/llvm/lib/Target/CellSPU/SPUInstrBuilder.h @@ -1,4 +1,4 @@ -//==-- SPUInstrBuilder.h - Aides for building Cell SPU insts -----*- C++ -*-==// +//===-- SPUInstrBuilder.h - Aides for building Cell SPU insts ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPUInstrFormats.td b/llvm/lib/Target/CellSPU/SPUInstrFormats.td index bdbe2552dcd..cd3f4221434 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrFormats.td +++ b/llvm/lib/Target/CellSPU/SPUInstrFormats.td @@ -1,10 +1,10 @@ -//==== SPUInstrFormats.td - Cell SPU Instruction Formats ---*- tablegen -*-===// -// +//===-- SPUInstrFormats.td - Cell SPU Instruction Formats --*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp index 007bc0e02c7..759923d7bb4 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- SPUInstrInfo.cpp - Cell SPU Instruction Information ----------------===// +//===-- SPUInstrInfo.cpp - Cell SPU Instruction Information ---------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.h b/llvm/lib/Target/CellSPU/SPUInstrInfo.h index bc1ba71f7a4..f0d21adc849 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrInfo.h +++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.h @@ -1,4 +1,4 @@ -//===- SPUInstrInfo.h - Cell SPU Instruction Information --------*- C++ -*-===// +//===-- SPUInstrInfo.h - Cell SPU Instruction Information -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPUMachineFunction.cpp b/llvm/lib/Target/CellSPU/SPUMachineFunction.cpp index 5df522ef550..3e948d071d6 100644 --- a/llvm/lib/Target/CellSPU/SPUMachineFunction.cpp +++ b/llvm/lib/Target/CellSPU/SPUMachineFunction.cpp @@ -1,4 +1,4 @@ -//==-- SPUMachineFunctionInfo.cpp - Private data used for CellSPU -*- C++ -*-=// +//==-- SPUMachineFunctionInfo.cpp - Private data used for CellSPU ---------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPUMathInstr.td b/llvm/lib/Target/CellSPU/SPUMathInstr.td index ed7129e3329..9a5c3976afb 100644 --- a/llvm/lib/Target/CellSPU/SPUMathInstr.td +++ b/llvm/lib/Target/CellSPU/SPUMathInstr.td @@ -1,4 +1,4 @@ -//======--- SPUMathInst.td - Cell SPU math operations -*- tablegen -*---======// +//===-- SPUMathInst.td - Cell SPU math operations ---------*- tablegen -*--===// // // Cell SPU math operations // diff --git a/llvm/lib/Target/CellSPU/SPUNodes.td b/llvm/lib/Target/CellSPU/SPUNodes.td index a6e621f36b3..a47e9ef0167 100644 --- a/llvm/lib/Target/CellSPU/SPUNodes.td +++ b/llvm/lib/Target/CellSPU/SPUNodes.td @@ -1,4 +1,4 @@ -//===- SPUNodes.td - Specialized SelectionDAG nodes used for CellSPU ------===// +//=== SPUNodes.td - Specialized SelectionDAG nodes by CellSPU -*- tablegen -*-// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPUNopFiller.cpp b/llvm/lib/Target/CellSPU/SPUNopFiller.cpp index e2bd2d7f410..7c58041e3b8 100644 --- a/llvm/lib/Target/CellSPU/SPUNopFiller.cpp +++ b/llvm/lib/Target/CellSPU/SPUNopFiller.cpp @@ -1,4 +1,4 @@ -//===-- SPUNopFiller.cpp - Add nops/lnops to align the pipelines---===// +//===-- SPUNopFiller.cpp - Add nops/lnops to align the pipelines ----------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPUOperands.td b/llvm/lib/Target/CellSPU/SPUOperands.td index 96cde51709e..6f8deef5530 100644 --- a/llvm/lib/Target/CellSPU/SPUOperands.td +++ b/llvm/lib/Target/CellSPU/SPUOperands.td @@ -1,10 +1,10 @@ -//===- SPUOperands.td - Cell SPU Instruction Operands ------*- tablegen -*-===// -// +//===-- SPUOperands.td - Cell SPU Instruction Operands -----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // Cell SPU Instruction Operands: //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp b/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp index bbac6fd0be5..f4dd44105dd 100644 --- a/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp +++ b/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- SPURegisterInfo.cpp - Cell SPU Register Information ----------------===// +//===-- SPURegisterInfo.cpp - Cell SPU Register Information ---------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPURegisterInfo.h b/llvm/lib/Target/CellSPU/SPURegisterInfo.h index b7818a47abd..2e95247d654 100644 --- a/llvm/lib/Target/CellSPU/SPURegisterInfo.h +++ b/llvm/lib/Target/CellSPU/SPURegisterInfo.h @@ -1,4 +1,4 @@ -//===- SPURegisterInfo.h - Cell SPU Register Information Impl ----*- C++ -*-==// +//===-- SPURegisterInfo.h - Cell SPU Register Information Impl --*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPURegisterInfo.td b/llvm/lib/Target/CellSPU/SPURegisterInfo.td index e16f51ff0e0..f27b042edd6 100644 --- a/llvm/lib/Target/CellSPU/SPURegisterInfo.td +++ b/llvm/lib/Target/CellSPU/SPURegisterInfo.td @@ -1,10 +1,10 @@ -//===- SPURegisterInfo.td - The Cell SPU Register File -----*- tablegen -*-===// -// +//===-- SPURegisterInfo.td - The Cell SPU Register File ----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // diff --git a/llvm/lib/Target/CellSPU/SPUSchedule.td b/llvm/lib/Target/CellSPU/SPUSchedule.td index 9cd3c2327df..9ccd0844e48 100644 --- a/llvm/lib/Target/CellSPU/SPUSchedule.td +++ b/llvm/lib/Target/CellSPU/SPUSchedule.td @@ -1,10 +1,10 @@ -//===- SPUSchedule.td - Cell Scheduling Definitions --------*- tablegen -*-===// -// +//===-- SPUSchedule.td - Cell Scheduling Definitions -------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/CellSPU/SPUSubtarget.cpp b/llvm/lib/Target/CellSPU/SPUSubtarget.cpp index 43335abf0ac..ebfefe2bb46 100644 --- a/llvm/lib/Target/CellSPU/SPUSubtarget.cpp +++ b/llvm/lib/Target/CellSPU/SPUSubtarget.cpp @@ -1,4 +1,4 @@ -//===- SPUSubtarget.cpp - STI Cell SPU Subtarget Information --------------===// +//===-- SPUSubtarget.cpp - STI Cell SPU Subtarget Information -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/CellSPU/SPUTargetMachine.h b/llvm/lib/Target/CellSPU/SPUTargetMachine.h index 5daf7a5cfe5..c179292e582 100644 --- a/llvm/lib/Target/CellSPU/SPUTargetMachine.h +++ b/llvm/lib/Target/CellSPU/SPUTargetMachine.h @@ -1,4 +1,4 @@ -//===-- SPUTargetMachine.h - Define TargetMachine for Cell SPU ----*- C++ -*-=// +//===-- SPUTargetMachine.h - Define TargetMachine for Cell SPU --*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/Hexagon.td b/llvm/lib/Target/Hexagon/Hexagon.td index 72939e6f1f7..ab5093dbfcf 100644 --- a/llvm/lib/Target/Hexagon/Hexagon.td +++ b/llvm/lib/Target/Hexagon/Hexagon.td @@ -1,4 +1,4 @@ -//===- Hexagon.td - Describe the Hexagon Target Machine ---------*- C++ -*-===// +//===-- Hexagon.td - Describe the Hexagon Target Machine --*- tablegen -*--===// // // The LLVM Compiler Infrastructure // @@ -7,6 +7,7 @@ // //===----------------------------------------------------------------------===// // +// This is the top level entry point for the Hexagon target. // //===----------------------------------------------------------------------===// @@ -18,8 +19,7 @@ include "llvm/Target/Target.td" //===----------------------------------------------------------------------===// // Hexagon Subtarget features. -// - +//===----------------------------------------------------------------------===// // Hexagon Archtectures def ArchV2 : SubtargetFeature<"v2", "HexagonArchVersion", "V2", diff --git a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp index 4d0c5fa63cb..1de9af2d534 100644 --- a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp +++ b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp @@ -1,4 +1,4 @@ -//===-- HexagonAsmPrinter.cpp - Print machine instrs to Hexagon assembly ----=// +//===-- HexagonAsmPrinter.cpp - Print machine instrs to Hexagon assembly --===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp b/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp index 28439eb1560..9bca9e07070 100644 --- a/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp +++ b/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp @@ -1,4 +1,4 @@ -//===---- HexagonCFGOptimizer.cpp - CFG optimizations ---------------------===// +//===-- HexagonCFGOptimizer.cpp - CFG optimizations -----------------------===// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source diff --git a/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp b/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp index f2f60c56e48..21004744603 100644 --- a/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp +++ b/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp @@ -1,11 +1,11 @@ -//===- HexagonExpandPredSpillCode.cpp - Expand Predicate Spill Code -------===// +//===-- HexagonExpandPredSpillCode.cpp - Expand Predicate Spill Code ------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // -//===----------------------------------------------------------------------===//// +//===----------------------------------------------------------------------===// // The Hexagon processor has no instructions that load or store predicate // registers directly. So, when these registers must be spilled a general // purpose register must be found and the value copied to/from it from/to diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp index 326903ad24a..d66551fd8d4 100644 --- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp @@ -1,4 +1,4 @@ -//===- HexagonFrameLowering.cpp - Define frame lowering -------------------===// +//===-- HexagonFrameLowering.cpp - Define frame lowering ------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp index 086f9bc9264..9df965efc14 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp @@ -1,4 +1,4 @@ -//==-- HexagonISelDAGToDAG.cpp - A dag to dag inst selector for Hexagon ----==// +//===-- HexagonISelDAGToDAG.cpp - A dag to dag inst selector for Hexagon --===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.h b/llvm/lib/Target/Hexagon/HexagonISelLowering.h index b327615f8c6..b7a86675f17 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.h +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.h @@ -1,4 +1,4 @@ -//==-- HexagonISelLowering.h - Hexagon DAG Lowering Interface ----*- C++ -*-==// +//===-- HexagonISelLowering.h - Hexagon DAG Lowering Interface --*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonImmediates.td b/llvm/lib/Target/Hexagon/HexagonImmediates.td index 0422a4312bb..18589a2b57a 100644 --- a/llvm/lib/Target/Hexagon/HexagonImmediates.td +++ b/llvm/lib/Target/Hexagon/HexagonImmediates.td @@ -1,4 +1,4 @@ -//=- HexagonImmediates.td - Hexagon immediate processing --*- tablegen -*-=// +//===- HexagonImmediates.td - Hexagon immediate processing -*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonInstrFormats.td b/llvm/lib/Target/Hexagon/HexagonInstrFormats.td index 65d8a9223bd..c9f16fb538a 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrFormats.td +++ b/llvm/lib/Target/Hexagon/HexagonInstrFormats.td @@ -7,16 +7,16 @@ // //===----------------------------------------------------------------------===// -//----------------------------------------------------------------------------// +//===----------------------------------------------------------------------===// // Hexagon Intruction Flags + // // *** Must match HexagonBaseInfo.h *** -//----------------------------------------------------------------------------// +//===----------------------------------------------------------------------===// -//----------------------------------------------------------------------------// +//===----------------------------------------------------------------------===// // Intruction Class Declaration + -//----------------------------------------------------------------------------// +//===----------------------------------------------------------------------===// class InstHexagon<dag outs, dag ins, string asmstr, list<dag> pattern, string cstr, InstrItinClass itin> : Instruction { @@ -40,9 +40,9 @@ class InstHexagon<dag outs, dag ins, string asmstr, list<dag> pattern, // *** The code above must match HexagonBaseInfo.h *** } -//----------------------------------------------------------------------------// +//===----------------------------------------------------------------------===// // Intruction Classes Definitions + -//----------------------------------------------------------------------------// +//===----------------------------------------------------------------------===// // LD Instruction Class in V2/V3/V4. // Definition of the instruction class NOT CHANGED. @@ -188,9 +188,9 @@ class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern> : InstHexagon<outs, ins, asmstr, pattern, "", PSEUDO>; -//----------------------------------------------------------------------------// +//===----------------------------------------------------------------------===// // Intruction Classes Definitions - -//----------------------------------------------------------------------------// +//===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp index a34b8135cb1..9c830d03887 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- HexagonInstrInfo.cpp - Hexagon Instruction Information -------------===// +//===-- HexagonInstrInfo.cpp - Hexagon Instruction Information ------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.h b/llvm/lib/Target/Hexagon/HexagonInstrInfo.h index 1e3ba01e29e..eb088c34d28 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.h +++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.h @@ -1,4 +1,4 @@ -//=- HexagonInstrInfo.h - Hexagon Instruction Information ---------*- C++ -*-=// +//===- HexagonInstrInfo.h - Hexagon Instruction Information -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonIntrinsics.td b/llvm/lib/Target/Hexagon/HexagonIntrinsics.td index 1328ebab57f..b15e293fdfb 100644 --- a/llvm/lib/Target/Hexagon/HexagonIntrinsics.td +++ b/llvm/lib/Target/Hexagon/HexagonIntrinsics.td @@ -1,4 +1,4 @@ -//===- HexagonIntrinsics.td - Instruction intrinsics -------*- tablegen -*-===// +//===-- HexagonIntrinsics.td - Instruction intrinsics ------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp b/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp index 6bbc71dd719..d776c09459b 100644 --- a/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- HexagonRegisterInfo.cpp - Hexagon Register Information -------------===// +//===-- HexagonRegisterInfo.cpp - Hexagon Register Information ------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonRegisterInfo.td b/llvm/lib/Target/Hexagon/HexagonRegisterInfo.td index d74a6832856..f4322b38d5d 100644 --- a/llvm/lib/Target/Hexagon/HexagonRegisterInfo.td +++ b/llvm/lib/Target/Hexagon/HexagonRegisterInfo.td @@ -1,4 +1,4 @@ -//===- HexagonRegisterInfo.td - Hexagon Register defs ------*- tablegen -*-===// +//===-- HexagonRegisterInfo.td - Hexagon Register defs -----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonSchedule.td b/llvm/lib/Target/Hexagon/HexagonSchedule.td index 427d1cb138e..fbea4452ec6 100644 --- a/llvm/lib/Target/Hexagon/HexagonSchedule.td +++ b/llvm/lib/Target/Hexagon/HexagonSchedule.td @@ -1,4 +1,4 @@ -//===-HexagonSchedule.td - Hexagon Scheduling Definitions -------*- C++ -*-===// +//===- HexagonSchedule.td - Hexagon Scheduling Definitions -*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonSelectCCInfo.td b/llvm/lib/Target/Hexagon/HexagonSelectCCInfo.td index dcee59fb847..d8feb89c0ab 100644 --- a/llvm/lib/Target/Hexagon/HexagonSelectCCInfo.td +++ b/llvm/lib/Target/Hexagon/HexagonSelectCCInfo.td @@ -1,4 +1,4 @@ -//=-HexagoSelectCCInfo.td - Selectcc mappings ----------------*- tablegen -*-=// +//===-- HexagoSelectCCInfo.td - Selectcc mappings ----------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h index 86fa026f3fa..0673e4d3547 100644 --- a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h +++ b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h @@ -1,4 +1,4 @@ -//=-- HexagonSelectionDAGInfo.h - Hexagon SelectionDAG Info ------*- C++ -*-=// +//===-- HexagonSelectionDAGInfo.h - Hexagon SelectionDAG Info ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonSplitTFRCondSets.cpp b/llvm/lib/Target/Hexagon/HexagonSplitTFRCondSets.cpp index 083091c1959..d10c9f2d524 100644 --- a/llvm/lib/Target/Hexagon/HexagonSplitTFRCondSets.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSplitTFRCondSets.cpp @@ -1,4 +1,4 @@ -//===---- HexagonSplitTFRCondSets.cpp - split TFR condsets into xfers -----===// +//===-- HexagonSplitTFRCondSets.cpp - split TFR condsets into xfers -------===// // // The LLVM Compiler Infrastructure // @@ -6,7 +6,7 @@ // License. See LICENSE.TXT for details. // // -//===----------------------------------------------------------------------===//// +//===----------------------------------------------------------------------===// // This pass tries to provide opportunities for better optimization of muxes. // The default code generated for something like: flag = (a == b) ? 1 : 3; // would be: diff --git a/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp b/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp index 39c70223f98..654d33626ed 100644 --- a/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp @@ -1,4 +1,4 @@ -//===- HexagonSubtarget.cpp - Hexagon Subtarget Information ---------------===// +//===-- HexagonSubtarget.cpp - Hexagon Subtarget Information --------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonSubtarget.h b/llvm/lib/Target/Hexagon/HexagonSubtarget.h index 6de85df7f05..3079086986d 100644 --- a/llvm/lib/Target/Hexagon/HexagonSubtarget.h +++ b/llvm/lib/Target/Hexagon/HexagonSubtarget.h @@ -1,4 +1,4 @@ -//==-- HexagonSubtarget.h - Define Subtarget for the Hexagon ----*- C++ -*-==// +//===-- HexagonSubtarget.h - Define Subtarget for the Hexagon ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp index 6c418854a48..319eab2a254 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -1,4 +1,4 @@ -//===- HexagonTargetMachine.cpp - Define TargetMachine for Hexagon --------===// +//===-- HexagonTargetMachine.cpp - Define TargetMachine for Hexagon -------===// // // The LLVM Compiler Infrastructure // @@ -7,6 +7,7 @@ // //===----------------------------------------------------------------------===// // +// Implements the info about Hexagon target spec. // //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp b/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp index 188337d4700..d3ce5a6e6f4 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp @@ -1,4 +1,4 @@ -//===-- HexagonTargetObjectFile.cpp - Hexagon asm properties ----*- C++ -*-===// +//===-- HexagonTargetObjectFile.cpp - Hexagon asm properties --------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.h b/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.h index 101c1f2d3e2..693345081ee 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.h +++ b/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.h @@ -1,4 +1,4 @@ -//===-- HexagonTargetAsmInfo.h - Hexagon asm properties ---------*- C++ -*--==// +//===-- HexagonTargetAsmInfo.h - Hexagon asm properties --------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/HexagonVarargsCallingConvention.h b/llvm/lib/Target/Hexagon/HexagonVarargsCallingConvention.h index 21b2d678ac5..9305c2702fa 100644 --- a/llvm/lib/Target/Hexagon/HexagonVarargsCallingConvention.h +++ b/llvm/lib/Target/Hexagon/HexagonVarargsCallingConvention.h @@ -1,4 +1,4 @@ -//==-- HexagonVarargsCallingConvention.h - Calling Conventions ---*- C++ -*-==// +//===-- HexagonVarargsCallingConvention.h - Calling Conventions -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h index 7e912dff259..ed55c3c1c15 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h @@ -1,4 +1,4 @@ -//===-- HexagonBaseInfo.h - Top level definitions for Hexagon -------------===// +//===-- HexagonBaseInfo.h - Top level definitions for Hexagon --*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp index 188693cf63f..d6e6c36af5d 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp @@ -1,4 +1,4 @@ -//===-- HexagonMCAsmInfo.cpp - Hexagon asm properties -----------*- C++ -*-===// +//===-- HexagonMCAsmInfo.cpp - Hexagon asm properties ---------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.h index 8196e956f70..d336cd5be91 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.h +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.h @@ -1,4 +1,4 @@ -//===-- HexagonTargetAsmInfo.h - Hexagon asm properties ---------*- C++ -*--==// +//===-- HexagonTargetAsmInfo.h - Hexagon asm properties --------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp index 39633698a25..74abc56817e 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- HexagonMCTargetDesc.cpp - Cell Hexagon Target Descriptions -----*- C++ -*-===// +//===-- HexagonMCTargetDesc.cpp - Cell Hexagon Target Descriptions --------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp b/llvm/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp index 93563f6f210..77a77974d85 100644 --- a/llvm/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp +++ b/llvm/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp @@ -1,4 +1,4 @@ -//===- MBlazeDisassembler.cpp - Disassembler for MicroBlaze ----*- C++ -*-===// +//===-- MBlazeDisassembler.cpp - Disassembler for MicroBlaze -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.h b/llvm/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.h index a951e3587d7..97c4af963c9 100644 --- a/llvm/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.h +++ b/llvm/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.h @@ -1,4 +1,4 @@ -//===- MBlazeDisassembler.h - Disassembler for MicroBlaze ------*- C++ -*-===// +//===-- MBlazeDisassembler.h - Disassembler for MicroBlaze -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h b/llvm/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h index 52975631485..c6f30036bc8 100644 --- a/llvm/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h +++ b/llvm/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h @@ -1,4 +1,4 @@ -//===-- MBlazeInstPrinter.h - Convert MBlaze MCInst to assembly syntax ----===// +//= MBlazeInstPrinter.h - Convert MBlaze MCInst to assembly syntax -*- C++ -*-// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlaze.td b/llvm/lib/Target/MBlaze/MBlaze.td index 1245658d29b..b4edff0709e 100644 --- a/llvm/lib/Target/MBlaze/MBlaze.td +++ b/llvm/lib/Target/MBlaze/MBlaze.td @@ -1,4 +1,4 @@ -//===- MBlaze.td - Describe the MBlaze Target Machine ------*- tablegen -*-===// +//===-- MBlaze.td - Describe the MBlaze Target Machine -----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeFrameLowering.cpp b/llvm/lib/Target/MBlaze/MBlazeFrameLowering.cpp index 37919bce277..65310649dc5 100644 --- a/llvm/lib/Target/MBlaze/MBlazeFrameLowering.cpp +++ b/llvm/lib/Target/MBlaze/MBlazeFrameLowering.cpp @@ -1,4 +1,4 @@ -//===- MBlazeFrameLowering.cpp - MBlaze Frame Information ------*- C++ -*-====// +//===-- MBlazeFrameLowering.cpp - MBlaze Frame Information ---------------====// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeInstrFPU.td b/llvm/lib/Target/MBlaze/MBlazeInstrFPU.td index 4acdcfdd772..3f145938728 100644 --- a/llvm/lib/Target/MBlaze/MBlazeInstrFPU.td +++ b/llvm/lib/Target/MBlaze/MBlazeInstrFPU.td @@ -1,4 +1,4 @@ -//===- MBlazeInstrFPU.td - MBlaze FPU Instruction defs -----*- tablegen -*-===// +//===-- MBlazeInstrFPU.td - MBlaze FPU Instruction defs ----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeInstrFSL.td b/llvm/lib/Target/MBlaze/MBlazeInstrFSL.td index 3082a7e227f..91b69de0510 100644 --- a/llvm/lib/Target/MBlaze/MBlazeInstrFSL.td +++ b/llvm/lib/Target/MBlaze/MBlazeInstrFSL.td @@ -1,4 +1,4 @@ -//===- MBlazeInstrFSL.td - MBlaze FSL Instruction defs -----*- tablegen -*-===// +//===-- MBlazeInstrFSL.td - MBlaze FSL Instruction defs ----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeInstrFormats.td b/llvm/lib/Target/MBlaze/MBlazeInstrFormats.td index 4c6034d71ab..e40432a1b9a 100644 --- a/llvm/lib/Target/MBlaze/MBlazeInstrFormats.td +++ b/llvm/lib/Target/MBlaze/MBlazeInstrFormats.td @@ -1,4 +1,4 @@ -//===- MBlazeInstrFormats.td - MB Instruction defs ---------*- tablegen -*-===// +//===-- MBlazeInstrFormats.td - MB Instruction defs --------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeInstrInfo.cpp b/llvm/lib/Target/MBlaze/MBlazeInstrInfo.cpp index 7ae05b367cb..db71434443b 100644 --- a/llvm/lib/Target/MBlaze/MBlazeInstrInfo.cpp +++ b/llvm/lib/Target/MBlaze/MBlazeInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- MBlazeInstrInfo.cpp - MBlaze Instruction Information -----*- C++ -*-===// +//===-- MBlazeInstrInfo.cpp - MBlaze Instruction Information --------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h b/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h index 7174405a49d..a309d2b7152 100644 --- a/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h +++ b/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h @@ -1,4 +1,4 @@ -//===- MBlazeInstrInfo.h - MBlaze Instruction Information -------*- C++ -*-===// +//===-- MBlazeInstrInfo.h - MBlaze Instruction Information ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeInstrInfo.td b/llvm/lib/Target/MBlaze/MBlazeInstrInfo.td index 9fe2a49065b..02a21574f49 100644 --- a/llvm/lib/Target/MBlaze/MBlazeInstrInfo.td +++ b/llvm/lib/Target/MBlaze/MBlazeInstrInfo.td @@ -1,4 +1,4 @@ -//===- MBlazeInstrInfo.td - MBlaze Instruction defs --------*- tablegen -*-===// +//===-- MBlazeInstrInfo.td - MBlaze Instruction defs -------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeIntrinsicInfo.cpp b/llvm/lib/Target/MBlaze/MBlazeIntrinsicInfo.cpp index e10126fe228..b3651158a37 100644 --- a/llvm/lib/Target/MBlaze/MBlazeIntrinsicInfo.cpp +++ b/llvm/lib/Target/MBlaze/MBlazeIntrinsicInfo.cpp @@ -1,4 +1,4 @@ -//===- MBlazeIntrinsicInfo.cpp - Intrinsic Information -00-------*- C++ -*-===// +//===-- MBlazeIntrinsicInfo.cpp - Intrinsic Information -------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeIntrinsicInfo.h b/llvm/lib/Target/MBlaze/MBlazeIntrinsicInfo.h index 80760d87e00..34f379230de 100644 --- a/llvm/lib/Target/MBlaze/MBlazeIntrinsicInfo.h +++ b/llvm/lib/Target/MBlaze/MBlazeIntrinsicInfo.h @@ -1,4 +1,4 @@ -//===- MBlazeIntrinsicInfo.h - MBlaze Intrinsic Information -----*- C++ -*-===// +//===-- MBlazeIntrinsicInfo.h - MBlaze Intrinsic Information ----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeIntrinsics.td b/llvm/lib/Target/MBlaze/MBlazeIntrinsics.td index 278afbefc16..b5dc59547bb 100644 --- a/llvm/lib/Target/MBlaze/MBlazeIntrinsics.td +++ b/llvm/lib/Target/MBlaze/MBlazeIntrinsics.td @@ -1,4 +1,4 @@ -//===- IntrinsicsMBlaze.td - Defines MBlaze intrinsics -----*- tablegen -*-===// +//===-- IntrinsicsMBlaze.td - Defines MBlaze intrinsics ----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeMCInstLower.h b/llvm/lib/Target/MBlaze/MBlazeMCInstLower.h index 92196f22022..bb77ed4b802 100644 --- a/llvm/lib/Target/MBlaze/MBlazeMCInstLower.h +++ b/llvm/lib/Target/MBlaze/MBlazeMCInstLower.h @@ -1,4 +1,4 @@ -//===-- MBlazeMCInstLower.h - Lower MachineInstr to MCInst ----------------===// +//===-- MBlazeMCInstLower.h - Lower MachineInstr to MCInst ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeMachineFunction.cpp b/llvm/lib/Target/MBlaze/MBlazeMachineFunction.cpp index c048879f4e9..2217b5477d6 100644 --- a/llvm/lib/Target/MBlaze/MBlazeMachineFunction.cpp +++ b/llvm/lib/Target/MBlaze/MBlazeMachineFunction.cpp @@ -1,4 +1,4 @@ -//===-- MBlazeMachineFunctionInfo.cpp - Private data --------------*- C++ -*-=// +//===-- MBlazeMachineFunctionInfo.cpp - Private data ----------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeMachineFunction.h b/llvm/lib/Target/MBlaze/MBlazeMachineFunction.h index 30abde26ebd..95cc5077cc1 100644 --- a/llvm/lib/Target/MBlaze/MBlazeMachineFunction.h +++ b/llvm/lib/Target/MBlaze/MBlazeMachineFunction.h @@ -1,4 +1,4 @@ -//===-- MBlazeMachineFunctionInfo.h - Private data ----------------*- C++ -*-=// +//===-- MBlazeMachineFunctionInfo.h - Private data --------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp b/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp index 0b1b10796b7..e63f739ece4 100644 --- a/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp +++ b/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- MBlazeRegisterInfo.cpp - MBlaze Register Information -== -*- C++ -*-===// +//===-- MBlazeRegisterInfo.cpp - MBlaze Register Information --------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.h b/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.h index 7e4b269cb88..7adac8e494f 100644 --- a/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.h +++ b/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.h @@ -1,4 +1,4 @@ -//===- MBlazeRegisterInfo.h - MBlaze Register Information Impl --*- C++ -*-===// +//===-- MBlazeRegisterInfo.h - MBlaze Register Information Impl -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.td b/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.td index 13c46ba1ecb..64cae5cff85 100644 --- a/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.td +++ b/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.td @@ -1,4 +1,4 @@ -//===- MBlazeRegisterInfo.td - MBlaze Register defs --------*- tablegen -*-===// +//===-- MBlazeRegisterInfo.td - MBlaze Register defs -------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeRelocations.h b/llvm/lib/Target/MBlaze/MBlazeRelocations.h index c298eda2195..6387ee23ec9 100644 --- a/llvm/lib/Target/MBlaze/MBlazeRelocations.h +++ b/llvm/lib/Target/MBlaze/MBlazeRelocations.h @@ -1,4 +1,4 @@ -//===- MBlazeRelocations.h - MBlaze Code Relocations ------------*- C++ -*-===// +//===-- MBlazeRelocations.h - MBlaze Code Relocations -----------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeSchedule.td b/llvm/lib/Target/MBlaze/MBlazeSchedule.td index 4662f25ceb1..4a3ae5fc147 100644 --- a/llvm/lib/Target/MBlaze/MBlazeSchedule.td +++ b/llvm/lib/Target/MBlaze/MBlazeSchedule.td @@ -1,4 +1,4 @@ -//===- MBlazeSchedule.td - MBlaze Scheduling Definitions ---*- tablegen -*-===// +//===-- MBlazeSchedule.td - MBlaze Scheduling Definitions --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeSchedule3.td b/llvm/lib/Target/MBlaze/MBlazeSchedule3.td index ccbf99dbd3a..20257a60a0f 100644 --- a/llvm/lib/Target/MBlaze/MBlazeSchedule3.td +++ b/llvm/lib/Target/MBlaze/MBlazeSchedule3.td @@ -1,4 +1,4 @@ -//===- MBlazeSchedule3.td - MBlaze Scheduling Definitions --*- tablegen -*-===// +//===-- MBlazeSchedule3.td - MBlaze Scheduling Definitions -*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeSchedule5.td b/llvm/lib/Target/MBlaze/MBlazeSchedule5.td index fa88766fdb1..ab53b424ded 100644 --- a/llvm/lib/Target/MBlaze/MBlazeSchedule5.td +++ b/llvm/lib/Target/MBlaze/MBlazeSchedule5.td @@ -1,4 +1,4 @@ -//===- MBlazeSchedule5.td - MBlaze Scheduling Definitions --*- tablegen -*-===// +//===-- MBlazeSchedule5.td - MBlaze Scheduling Definitions -*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeSubtarget.cpp b/llvm/lib/Target/MBlaze/MBlazeSubtarget.cpp index 7e5667f55c1..d12d14245ea 100644 --- a/llvm/lib/Target/MBlaze/MBlazeSubtarget.cpp +++ b/llvm/lib/Target/MBlaze/MBlazeSubtarget.cpp @@ -1,4 +1,4 @@ -//===- MBlazeSubtarget.cpp - MBlaze Subtarget Information -------*- C++ -*-===// +//===-- MBlazeSubtarget.cpp - MBlaze Subtarget Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeSubtarget.h b/llvm/lib/Target/MBlaze/MBlazeSubtarget.h index 43b0197ad5a..eb375046f21 100644 --- a/llvm/lib/Target/MBlaze/MBlazeSubtarget.h +++ b/llvm/lib/Target/MBlaze/MBlazeSubtarget.h @@ -1,4 +1,4 @@ -//=====-- MBlazeSubtarget.h - Define Subtarget for the MBlaze -*- C++ -*--====// +//===-- MBlazeSubtarget.h - Define Subtarget for the MBlaze ----*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h b/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h index 512bcd0a318..1647a216921 100644 --- a/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h +++ b/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h @@ -1,4 +1,4 @@ -//===-- MBlazeTargetMachine.h - Define TargetMachine for MBlaze --- C++ ---===// +//===-- MBlazeTargetMachine.h - Define TargetMachine for MBlaze -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h b/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h index 284309dd6f2..36bf655c52c 100644 --- a/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h +++ b/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h @@ -1,4 +1,4 @@ -//=====-- MBlazeMCAsmInfo.h - MBlaze asm properties -----------*- C++ -*--====// +//===-- MBlazeMCAsmInfo.h - MBlaze asm properties --------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp b/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp index a3a5cf4e3e1..9d64cf2306f 100644 --- a/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp +++ b/llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- MBlazeMCTargetDesc.cpp - MBlaze Target Descriptions -----*- C++ -*-===// +//===-- MBlazeMCTargetDesc.cpp - MBlaze Target Descriptions ---------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h b/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h index a1984a8aec1..6f95ca35fae 100644 --- a/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h +++ b/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h @@ -1,4 +1,4 @@ -//===-- MSP430InstPrinter.h - Convert MSP430 MCInst to assembly syntax ----===// +//= MSP430InstPrinter.h - Convert MSP430 MCInst to assembly syntax -*- C++ -*-// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h index 17658f5719e..690fc19f1c5 100644 --- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h +++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h @@ -1,4 +1,4 @@ -//=====-- MSP430MCAsmInfo.h - MSP430 asm properties -----------*- C++ -*--====// +//===-- MSP430MCAsmInfo.h - MSP430 asm properties --------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp index 0d532e3515f..22cc33ab661 100644 --- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp +++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- MSP430MCTargetDesc.cpp - MSP430 Target Descriptions -----*- C++ -*-===// +//===-- MSP430MCTargetDesc.cpp - MSP430 Target Descriptions ---------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430.td b/llvm/lib/Target/MSP430/MSP430.td index 5cc5e6e3d7c..c6796b3789a 100644 --- a/llvm/lib/Target/MSP430/MSP430.td +++ b/llvm/lib/Target/MSP430/MSP430.td @@ -1,4 +1,4 @@ -//===- MSP430.td - Describe the MSP430 Target Machine ---------*- tblgen -*-==// +//===-- MSP430.td - Describe the MSP430 Target Machine -----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp b/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp index bd644435c76..bdeb0c590f2 100644 --- a/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp +++ b/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp @@ -1,4 +1,4 @@ -//===-- MSP430BranchSelector.cpp - Emit long conditional branches--*- C++ -*-=// +//===-- MSP430BranchSelector.cpp - Emit long conditional branches ---------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp index e406ff25aa4..61d7f2bf476 100644 --- a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp +++ b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp @@ -1,4 +1,4 @@ -//======-- MSP430FrameLowering.cpp - MSP430 Frame Information -------=========// +//===-- MSP430FrameLowering.cpp - MSP430 Frame Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.h b/llvm/lib/Target/MSP430/MSP430ISelLowering.h index 237f6043573..d29a0fd34be 100644 --- a/llvm/lib/Target/MSP430/MSP430ISelLowering.h +++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.h @@ -1,4 +1,4 @@ -//==-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ------*- C++ -*-==// +//===-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430InstrFormats.td b/llvm/lib/Target/MSP430/MSP430InstrFormats.td index 73aef1facc0..a9e87dad0cd 100644 --- a/llvm/lib/Target/MSP430/MSP430InstrFormats.td +++ b/llvm/lib/Target/MSP430/MSP430InstrFormats.td @@ -1,4 +1,4 @@ -//===- MSP430InstrFormats.td - MSP430 Instruction Formats-----*- tblgen -*-===// +//===-- MSP430InstrFormats.td - MSP430 Instruction Formats -*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp b/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp index 61b491370d1..fd5de3425e2 100644 --- a/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp +++ b/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp @@ -1,4 +1,4 @@ -//===- MSP430InstrInfo.cpp - MSP430 Instruction Information ---------------===// +//===-- MSP430InstrInfo.cpp - MSP430 Instruction Information --------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430InstrInfo.h b/llvm/lib/Target/MSP430/MSP430InstrInfo.h index 90013f5c2e7..fe2a75c3ed7 100644 --- a/llvm/lib/Target/MSP430/MSP430InstrInfo.h +++ b/llvm/lib/Target/MSP430/MSP430InstrInfo.h @@ -1,4 +1,4 @@ -//===- MSP430InstrInfo.h - MSP430 Instruction Information -------*- C++ -*-===// +//===-- MSP430InstrInfo.h - MSP430 Instruction Information ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430InstrInfo.td b/llvm/lib/Target/MSP430/MSP430InstrInfo.td index 59cb59873ab..4348dd5e54e 100644 --- a/llvm/lib/Target/MSP430/MSP430InstrInfo.td +++ b/llvm/lib/Target/MSP430/MSP430InstrInfo.td @@ -1,4 +1,4 @@ -//===- MSP430InstrInfo.td - MSP430 Instruction defs -----------*- tblgen-*-===// +//===-- MSP430InstrInfo.td - MSP430 Instruction defs -------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp b/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp index e26172c000e..b1773fba7e9 100644 --- a/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp +++ b/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp @@ -1,4 +1,4 @@ -//===-- MSP430MCInstLower.cpp - Convert MSP430 MachineInstr to an MCInst---===// +//===-- MSP430MCInstLower.cpp - Convert MSP430 MachineInstr to an MCInst --===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430MCInstLower.h b/llvm/lib/Target/MSP430/MSP430MCInstLower.h index e937696406f..297efd2cdf6 100644 --- a/llvm/lib/Target/MSP430/MSP430MCInstLower.h +++ b/llvm/lib/Target/MSP430/MSP430MCInstLower.h @@ -1,4 +1,4 @@ -//===-- MSP430MCInstLower.h - Lower MachineInstr to MCInst ----------------===// +//===-- MSP430MCInstLower.h - Lower MachineInstr to MCInst ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp b/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp index 91058a4ee1e..0f753990845 100644 --- a/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp +++ b/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp @@ -1,4 +1,4 @@ -//==- MSP430MachineFuctionInfo.cpp - MSP430 machine function info -*- C++ -*-=// +//===-- MSP430MachineFuctionInfo.cpp - MSP430 machine function info -------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp b/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp index 9049c4bf8f6..a2dd1a19f87 100644 --- a/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp +++ b/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- MSP430RegisterInfo.cpp - MSP430 Register Information ---------------===// +//===-- MSP430RegisterInfo.cpp - MSP430 Register Information --------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430RegisterInfo.h b/llvm/lib/Target/MSP430/MSP430RegisterInfo.h index 06fa4901225..3dbca370947 100644 --- a/llvm/lib/Target/MSP430/MSP430RegisterInfo.h +++ b/llvm/lib/Target/MSP430/MSP430RegisterInfo.h @@ -1,4 +1,4 @@ -//===- MSP430RegisterInfo.h - MSP430 Register Information Impl --*- C++ -*-===// +//===-- MSP430RegisterInfo.h - MSP430 Register Information Impl -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430RegisterInfo.td b/llvm/lib/Target/MSP430/MSP430RegisterInfo.td index d1c2e3f7915..3f2eb8ccef1 100644 --- a/llvm/lib/Target/MSP430/MSP430RegisterInfo.td +++ b/llvm/lib/Target/MSP430/MSP430RegisterInfo.td @@ -1,4 +1,4 @@ -//===- MSP430RegisterInfo.td - MSP430 Register defs ----------*- tblgen -*-===// +//===-- MSP430RegisterInfo.td - MSP430 Register defs -------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430Subtarget.cpp b/llvm/lib/Target/MSP430/MSP430Subtarget.cpp index f47f4cb5a61..edeaf34676b 100644 --- a/llvm/lib/Target/MSP430/MSP430Subtarget.cpp +++ b/llvm/lib/Target/MSP430/MSP430Subtarget.cpp @@ -1,4 +1,4 @@ -//===- MSP430Subtarget.cpp - MSP430 Subtarget Information ---------*- C++ -*-=// +//===-- MSP430Subtarget.cpp - MSP430 Subtarget Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430Subtarget.h b/llvm/lib/Target/MSP430/MSP430Subtarget.h index 3743346fafd..e7bebbdd1a5 100644 --- a/llvm/lib/Target/MSP430/MSP430Subtarget.h +++ b/llvm/lib/Target/MSP430/MSP430Subtarget.h @@ -1,4 +1,4 @@ -//====-- MSP430Subtarget.h - Define Subtarget for the MSP430 ---*- C++ -*--===// +//===-- MSP430Subtarget.h - Define Subtarget for the MSP430 ----*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/MSP430/MSP430TargetMachine.h b/llvm/lib/Target/MSP430/MSP430TargetMachine.h index ed09424d7cf..f54146b3e33 100644 --- a/llvm/lib/Target/MSP430/MSP430TargetMachine.h +++ b/llvm/lib/Target/MSP430/MSP430TargetMachine.h @@ -1,4 +1,4 @@ -//==-- MSP430TargetMachine.h - Define TargetMachine for MSP430 ---*- C++ -*-==// +//===-- MSP430TargetMachine.h - Define TargetMachine for MSP430 -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/InstPrinter/PTXInstPrinter.h b/llvm/lib/Target/PTX/InstPrinter/PTXInstPrinter.h index 86dfd482885..8c74097d145 100644 --- a/llvm/lib/Target/PTX/InstPrinter/PTXInstPrinter.h +++ b/llvm/lib/Target/PTX/InstPrinter/PTXInstPrinter.h @@ -1,4 +1,4 @@ -//===-- PTXInstPrinter.h - Convert PTX MCInst to assembly syntax ----------===// +//===- PTXInstPrinter.h - Convert PTX MCInst to assembly syntax -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h b/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h index c4c8890f65b..32ca0696950 100644 --- a/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h +++ b/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h @@ -1,4 +1,4 @@ -//=====-- PTXMCAsmInfo.h - PTX asm properties -----------------*- C++ -*--====// +//===-- PTXMCAsmInfo.h - PTX asm properties --------------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp b/llvm/lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp index 09f86b5b726..035952eab34 100644 --- a/llvm/lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp +++ b/llvm/lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- PTXMCTargetDesc.cpp - PTX Target Descriptions -----------*- C++ -*-===// +//===-- PTXMCTargetDesc.cpp - PTX Target Descriptions ---------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTX.td b/llvm/lib/Target/PTX/PTX.td index 693bb9c4834..994a68ed207 100644 --- a/llvm/lib/Target/PTX/PTX.td +++ b/llvm/lib/Target/PTX/PTX.td @@ -1,4 +1,4 @@ -//===- PTX.td - Describe the PTX Target Machine ---------------*- tblgen -*-==// +//===-- PTX.td - Describe the PTX Target Machine -----------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXAsmPrinter.h b/llvm/lib/Target/PTX/PTXAsmPrinter.h index d5ea4dbc59c..74c8d58a3e9 100644 --- a/llvm/lib/Target/PTX/PTXAsmPrinter.h +++ b/llvm/lib/Target/PTX/PTXAsmPrinter.h @@ -1,4 +1,4 @@ -//===-- PTXAsmPrinter.h - Print machine code to a PTX file ----------------===// +//===-- PTXAsmPrinter.h - Print machine code to a PTX file ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXFrameLowering.cpp b/llvm/lib/Target/PTX/PTXFrameLowering.cpp index b621b9d634d..e6e268e480f 100644 --- a/llvm/lib/Target/PTX/PTXFrameLowering.cpp +++ b/llvm/lib/Target/PTX/PTXFrameLowering.cpp @@ -1,4 +1,4 @@ -//=======- PTXFrameLowering.cpp - PTX Frame Information -------*- C++ -*-=====// +//===-- PTXFrameLowering.cpp - PTX Frame Information ----------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXFrameLowering.h b/llvm/lib/Target/PTX/PTXFrameLowering.h index 9320676150d..831e81803df 100644 --- a/llvm/lib/Target/PTX/PTXFrameLowering.h +++ b/llvm/lib/Target/PTX/PTXFrameLowering.h @@ -1,4 +1,4 @@ -//===--- PTXFrameLowering.h - Define frame lowering for PTX --*- C++ -*----===// +//===-- PTXFrameLowering.h - Define frame lowering for PTX -----*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXISelLowering.h b/llvm/lib/Target/PTX/PTXISelLowering.h index 4d2566540af..38f8caa0c22 100644 --- a/llvm/lib/Target/PTX/PTXISelLowering.h +++ b/llvm/lib/Target/PTX/PTXISelLowering.h @@ -1,4 +1,4 @@ -//==-- PTXISelLowering.h - PTX DAG Lowering Interface ------------*- C++ -*-==// +//===-- PTXISelLowering.h - PTX DAG Lowering Interface ----------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXInstrFormats.td b/llvm/lib/Target/PTX/PTXInstrFormats.td index 397fdc319a8..267e8341293 100644 --- a/llvm/lib/Target/PTX/PTXInstrFormats.td +++ b/llvm/lib/Target/PTX/PTXInstrFormats.td @@ -1,4 +1,4 @@ -//===- PTXInstrFormats.td - PTX Instruction Formats ----------*- tblgen -*-===// +//===-- PTXInstrFormats.td - PTX Instruction Formats -------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXInstrInfo.cpp b/llvm/lib/Target/PTX/PTXInstrInfo.cpp index 7ce00646898..9d6cbf1e908 100644 --- a/llvm/lib/Target/PTX/PTXInstrInfo.cpp +++ b/llvm/lib/Target/PTX/PTXInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- PTXInstrInfo.cpp - PTX Instruction Information ---------------------===// +//===-- PTXInstrInfo.cpp - PTX Instruction Information --------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXInstrInfo.h b/llvm/lib/Target/PTX/PTXInstrInfo.h index 871f1ac8d37..fba89c09394 100644 --- a/llvm/lib/Target/PTX/PTXInstrInfo.h +++ b/llvm/lib/Target/PTX/PTXInstrInfo.h @@ -1,4 +1,4 @@ -//===- PTXInstrInfo.h - PTX Instruction Information -------------*- C++ -*-===// +//===-- PTXInstrInfo.h - PTX Instruction Information ------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXInstrInfo.td b/llvm/lib/Target/PTX/PTXInstrInfo.td index 19a862f4ec8..818d4445544 100644 --- a/llvm/lib/Target/PTX/PTXInstrInfo.td +++ b/llvm/lib/Target/PTX/PTXInstrInfo.td @@ -1,4 +1,4 @@ -//===- PTXInstrInfo.td - PTX Instruction defs -----------------*- tblgen-*-===// +//===-- PTXInstrInfo.td - PTX Instruction defs --------------*- tablegen-*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXInstrLoadStore.td b/llvm/lib/Target/PTX/PTXInstrLoadStore.td index 9b4f56cf25c..7a62684b91b 100644 --- a/llvm/lib/Target/PTX/PTXInstrLoadStore.td +++ b/llvm/lib/Target/PTX/PTXInstrLoadStore.td @@ -1,4 +1,4 @@ -//===- PTXInstrLoadStore.td - PTX Load/Store Instruction Defs -*- tblgen-*-===// +//===- PTXInstrLoadStore.td - PTX Load/Store Instruction Defs -*- tablegen-*-=// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXIntrinsicInstrInfo.td b/llvm/lib/Target/PTX/PTXIntrinsicInstrInfo.td index 9de1cb62719..3416f1cca96 100644 --- a/llvm/lib/Target/PTX/PTXIntrinsicInstrInfo.td +++ b/llvm/lib/Target/PTX/PTXIntrinsicInstrInfo.td @@ -1,4 +1,4 @@ -//===- PTXIntrinsicInstrInfo.td - Defines PTX intrinsics ---*- tablegen -*-===// +//===-- PTXIntrinsicInstrInfo.td - Defines PTX intrinsics --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXMCAsmStreamer.cpp b/llvm/lib/Target/PTX/PTXMCAsmStreamer.cpp index 38ecf5240a8..3ed67a6a9b4 100644 --- a/llvm/lib/Target/PTX/PTXMCAsmStreamer.cpp +++ b/llvm/lib/Target/PTX/PTXMCAsmStreamer.cpp @@ -1,4 +1,4 @@ -//===- lib/Target/PTX/PTXMCAsmStreamer.cpp - PTX Text Assembly Output -----===// +//===-- PTXMCAsmStreamer.cpp - PTX Text Assembly Output -------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXMachineFunctionInfo.cpp b/llvm/lib/Target/PTX/PTXMachineFunctionInfo.cpp index d471d4ce24a..60acfc75a2f 100644 --- a/llvm/lib/Target/PTX/PTXMachineFunctionInfo.cpp +++ b/llvm/lib/Target/PTX/PTXMachineFunctionInfo.cpp @@ -1,4 +1,4 @@ -//===- PTXMachineFuctionInfo.cpp - PTX machine function info -----*- C++ -*-==// +//===-- PTXMachineFuctionInfo.cpp - PTX machine function info -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXMachineFunctionInfo.h b/llvm/lib/Target/PTX/PTXMachineFunctionInfo.h index 3229f5f0353..bb7574cbcd7 100644 --- a/llvm/lib/Target/PTX/PTXMachineFunctionInfo.h +++ b/llvm/lib/Target/PTX/PTXMachineFunctionInfo.h @@ -1,4 +1,4 @@ -//===- PTXMachineFuctionInfo.h - PTX machine function info -------*- C++ -*-==// +//===-- PTXMachineFuctionInfo.h - PTX machine function info ------*- C++ -*-==// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXParamManager.cpp b/llvm/lib/Target/PTX/PTXParamManager.cpp index 7753787ebc5..74538e67c0c 100644 --- a/llvm/lib/Target/PTX/PTXParamManager.cpp +++ b/llvm/lib/Target/PTX/PTXParamManager.cpp @@ -1,4 +1,4 @@ -//===- PTXParamManager.cpp - Manager for .param variables -------*- C++ -*-===// +//===-- PTXParamManager.cpp - Manager for .param variables ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXParamManager.h b/llvm/lib/Target/PTX/PTXParamManager.h index 9fd2de52f7f..32342f7c2c4 100644 --- a/llvm/lib/Target/PTX/PTXParamManager.h +++ b/llvm/lib/Target/PTX/PTXParamManager.h @@ -1,4 +1,4 @@ -//===- PTXParamManager.h - Manager for .param variables ----------*- C++ -*-==// +//===-- PTXParamManager.h - Manager for .param variables --------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXRegisterInfo.cpp b/llvm/lib/Target/PTX/PTXRegisterInfo.cpp index c8062664a93..b8bb9e8a115 100644 --- a/llvm/lib/Target/PTX/PTXRegisterInfo.cpp +++ b/llvm/lib/Target/PTX/PTXRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- PTXRegisterInfo.cpp - PTX Register Information ---------------------===// +//===-- PTXRegisterInfo.cpp - PTX Register Information --------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXRegisterInfo.h b/llvm/lib/Target/PTX/PTXRegisterInfo.h index 8369271a2ac..b9e1fc5babd 100644 --- a/llvm/lib/Target/PTX/PTXRegisterInfo.h +++ b/llvm/lib/Target/PTX/PTXRegisterInfo.h @@ -1,4 +1,4 @@ -//===- PTXRegisterInfo.h - PTX Register Information Impl --------*- C++ -*-===// +//===-- PTXRegisterInfo.h - PTX Register Information Impl -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXRegisterInfo.td b/llvm/lib/Target/PTX/PTXRegisterInfo.td index 6ed6d3fe385..e8b262e48bd 100644 --- a/llvm/lib/Target/PTX/PTXRegisterInfo.td +++ b/llvm/lib/Target/PTX/PTXRegisterInfo.td @@ -1,5 +1,4 @@ - -//===- PTXRegisterInfo.td - PTX Register defs ----------------*- tblgen -*-===// +//===-- PTXRegisterInfo.td - PTX Register defs -------------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXSubtarget.cpp b/llvm/lib/Target/PTX/PTXSubtarget.cpp index aa8f0525932..454f64e6bba 100644 --- a/llvm/lib/Target/PTX/PTXSubtarget.cpp +++ b/llvm/lib/Target/PTX/PTXSubtarget.cpp @@ -1,4 +1,4 @@ -//===- PTXSubtarget.cpp - PTX Subtarget Information ---------------*- C++ -*-=// +//===-- PTXSubtarget.cpp - PTX Subtarget Information ----------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PTX/PTXSubtarget.h b/llvm/lib/Target/PTX/PTXSubtarget.h index 15b3d44a954..ce93fef02a1 100644 --- a/llvm/lib/Target/PTX/PTXSubtarget.h +++ b/llvm/lib/Target/PTX/PTXSubtarget.h @@ -1,4 +1,4 @@ -//====-- PTXSubtarget.h - Define Subtarget for the PTX ---------*- C++ -*--===// +//===-- PTXSubtarget.h - Define Subtarget for the PTX -----------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h index 4ed4b765c1c..6863183075c 100644 --- a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h +++ b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h @@ -1,4 +1,4 @@ -//===-- PPCInstPrinter.h - Convert PPC MCInst to assembly syntax ----------===// +//===- PPCInstPrinter.h - Convert PPC MCInst to assembly syntax -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h index 369bbdce11f..9c975c089ea 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h @@ -1,4 +1,4 @@ -//===-- PPCBaseInfo.h - Top level definitions for PPC -------- --*- C++ -*-===// +//===-- PPCBaseInfo.h - Top level definitions for PPC -----------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp index 94465d7205d..245b4578bf2 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp @@ -1,4 +1,4 @@ -//===-- PPCMCAsmInfo.cpp - PPC asm properties -------------------*- C++ -*-===// +//===-- PPCMCAsmInfo.cpp - PPC asm properties -----------------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h index cf11cbc8bd1..7b4ed9f14eb 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h @@ -1,4 +1,4 @@ -//=====-- PPCMCAsmInfo.h - PPC asm properties -----------------*- C++ -*--====// +//===-- PPCMCAsmInfo.h - PPC asm properties --------------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp index 831a5276d19..a46069f2d8d 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -------*- C++ -*-===// +//===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td index 367f9ccd27c..724374c22b4 100644 --- a/llvm/lib/Target/PowerPC/PPC.td +++ b/llvm/lib/Target/PowerPC/PPC.td @@ -1,10 +1,10 @@ -//===- PPC.td - Describe the PowerPC Target Machine --------*- tablegen -*-===// -// +//===-- PPC.td - Describe the PowerPC Target Machine -------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This is the top level entry point for the PowerPC target. diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index 5dc2d3df892..038047252d3 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -1,4 +1,4 @@ -//===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly --------=// +//===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp index 475edf309c0..5f775e16f1c 100644 --- a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp +++ b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp @@ -1,4 +1,4 @@ -//===-- PPCBranchSelector.cpp - Emit long conditional branches-----*- C++ -*-=// +//===-- PPCBranchSelector.cpp - Emit long conditional branches ------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCCallingConv.td b/llvm/lib/Target/PowerPC/PPCCallingConv.td index 441db94581a..8efc9c1eafd 100644 --- a/llvm/lib/Target/PowerPC/PPCCallingConv.td +++ b/llvm/lib/Target/PowerPC/PPCCallingConv.td @@ -1,10 +1,10 @@ //===- PPCCallingConv.td - Calling Conventions for PowerPC -*- tablegen -*-===// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This describes the calling conventions for the PowerPC 32- and 64-bit diff --git a/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp index 8f1f9a6d3c2..252a2d159ec 100644 --- a/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -1,4 +1,4 @@ -//===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=// +//===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC -----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp index 09de47fe8b2..6d612f716fb 100644 --- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -1,4 +1,4 @@ -//=====- PPCFrameLowering.cpp - PPC Frame Information -----------*- C++ -*-===// +//===-- PPCFrameLowering.cpp - PPC Frame Information ----------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.h b/llvm/lib/Target/PowerPC/PPCFrameLowering.h index 20faa71d414..d708541c668 100644 --- a/llvm/lib/Target/PowerPC/PPCFrameLowering.h +++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.h @@ -1,4 +1,4 @@ -//==-- PPCFrameLowering.h - Define frame lowering for PowerPC ----*- C++ -*-==// +//===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td index cdbc26497ee..ad2bdede491 100644 --- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td @@ -1,10 +1,10 @@ -//===- PPCInstr64Bit.td - The PowerPC 64-bit Support -------*- tablegen -*-===// -// +//===-- PPCInstr64Bit.td - The PowerPC 64-bit Support ------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the PowerPC 64-bit instructions. These patterns are used diff --git a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td index 256370fa5f5..707fa411cc2 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td @@ -1,10 +1,10 @@ -//===- PPCInstrAltivec.td - The PowerPC Altivec Extension --*- tablegen -*-===// -// +//===-- PPCInstrAltivec.td - The PowerPC Altivec Extension -*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the Altivec extension to the PowerPC instruction set. diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td index 84a15b1ca94..d332e2ac973 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td +++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td @@ -1,10 +1,10 @@ //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp index 6d16f1d401b..7a8ec40ab16 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- PPCInstrInfo.cpp - PowerPC32 Instruction Information -----*- C++ -*-===// +//===-- PPCInstrInfo.cpp - PowerPC Instruction Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.h b/llvm/lib/Target/PowerPC/PPCInstrInfo.h index e90f8cb242c..e5f171d5b32 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.h +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.h @@ -1,4 +1,4 @@ -//===- PPCInstrInfo.h - PowerPC Instruction Information ---------*- C++ -*-===// +//===-- PPCInstrInfo.h - PowerPC Instruction Information --------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#ifndef POWERPC32_INSTRUCTIONINFO_H -#define POWERPC32_INSTRUCTIONINFO_H +#ifndef POWERPC_INSTRUCTIONINFO_H +#define POWERPC_INSTRUCTIONINFO_H #include "PPC.h" #include "llvm/Target/TargetInstrInfo.h" diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index d4c9d1091cc..e234012bb22 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -1,10 +1,10 @@ -//===- PPCInstrInfo.td - The PowerPC Instruction Set -------*- tablegen -*-===// -// +//===-- PPCInstrInfo.td - The PowerPC Instruction Set ------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the subset of the 32-bit PowerPC instruction set, as used diff --git a/llvm/lib/Target/PowerPC/PPCJITInfo.h b/llvm/lib/Target/PowerPC/PPCJITInfo.h index 47ead59b587..2f8243a597e 100644 --- a/llvm/lib/Target/PowerPC/PPCJITInfo.h +++ b/llvm/lib/Target/PowerPC/PPCJITInfo.h @@ -1,4 +1,4 @@ -//===- PPCJITInfo.h - PowerPC impl. of the JIT interface --------*- C++ -*-===// +//===-- PPCJITInfo.h - PowerPC impl. of the JIT interface -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp index 238e4d134a3..6a0aec842be 100644 --- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp @@ -1,4 +1,4 @@ -//=-- PPCMachineFunctionInfo.cpp - Private data used for PowerPC --*- C++ -*-=// +//===-- PPCMachineFunctionInfo.cpp - Private data used for PowerPC --------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCPerfectShuffle.h b/llvm/lib/Target/PowerPC/PPCPerfectShuffle.h index 3164e33faae..17b836d1ed9 100644 --- a/llvm/lib/Target/PowerPC/PPCPerfectShuffle.h +++ b/llvm/lib/Target/PowerPC/PPCPerfectShuffle.h @@ -1,4 +1,4 @@ -//===-- PPCPerfectShuffle.h - Altivec Perfect Shuffle Table ---------------===// +//===-- PPCPerfectShuffle.h - Altivec Perfect Shuffle Table -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp index c70f6b4b5c6..e16b4615769 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- PPCRegisterInfo.cpp - PowerPC Register Information -------*- C++ -*-===// +//===-- PPCRegisterInfo.cpp - PowerPC Register Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.h b/llvm/lib/Target/PowerPC/PPCRegisterInfo.h index faf690f48de..c121faf2ce3 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.h +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.h @@ -1,4 +1,4 @@ -//===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==// +//===-- PPCRegisterInfo.h - PowerPC Register Information Impl ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td index 1acdf4eb853..0e55313b135 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td @@ -1,10 +1,10 @@ -//===- PPCRegisterInfo.td - The PowerPC Register File ------*- tablegen -*-===// -// +//===-- PPCRegisterInfo.td - The PowerPC Register File -----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // diff --git a/llvm/lib/Target/PowerPC/PPCRelocations.h b/llvm/lib/Target/PowerPC/PPCRelocations.h index a33e7e03370..0b392f99b6d 100644 --- a/llvm/lib/Target/PowerPC/PPCRelocations.h +++ b/llvm/lib/Target/PowerPC/PPCRelocations.h @@ -1,4 +1,4 @@ -//===- PPCRelocations.h - PPC32 Code Relocations ----------------*- C++ -*-===// +//===-- PPCRelocations.h - PPC Code Relocations -----------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#ifndef PPC32RELOCATIONS_H -#define PPC32RELOCATIONS_H +#ifndef PPCRELOCATIONS_H +#define PPCRELOCATIONS_H #include "llvm/CodeGen/MachineRelocation.h" diff --git a/llvm/lib/Target/PowerPC/PPCSchedule.td b/llvm/lib/Target/PowerPC/PPCSchedule.td index 69e435bbfd8..4e37d0a695e 100644 --- a/llvm/lib/Target/PowerPC/PPCSchedule.td +++ b/llvm/lib/Target/PowerPC/PPCSchedule.td @@ -1,10 +1,10 @@ -//===- PPCSchedule.td - PowerPC Scheduling Definitions -----*- tablegen -*-===// -// +//===-- PPCSchedule.td - PowerPC Scheduling Definitions ----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/PowerPC/PPCSchedule440.td b/llvm/lib/Target/PowerPC/PPCSchedule440.td index 94ee9bd4aa4..76f74655f2f 100644 --- a/llvm/lib/Target/PowerPC/PPCSchedule440.td +++ b/llvm/lib/Target/PowerPC/PPCSchedule440.td @@ -1,10 +1,10 @@ -//===- PPCSchedule440.td - PPC 440 Scheduling Definitions --*- tablegen -*-===// -// +//===-- PPCSchedule440.td - PPC 440 Scheduling Definitions -*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // Primary reference: diff --git a/llvm/lib/Target/PowerPC/PPCScheduleG3.td b/llvm/lib/Target/PowerPC/PPCScheduleG3.td index ad4da1fe224..e7e54987664 100644 --- a/llvm/lib/Target/PowerPC/PPCScheduleG3.td +++ b/llvm/lib/Target/PowerPC/PPCScheduleG3.td @@ -1,10 +1,10 @@ -//===- PPCScheduleG3.td - PPC G3 Scheduling Definitions ----*- tablegen -*-===// -// +//===-- PPCScheduleG3.td - PPC G3 Scheduling Definitions ---*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines the itinerary class data for the G3 (750) processor. diff --git a/llvm/lib/Target/PowerPC/PPCScheduleG4.td b/llvm/lib/Target/PowerPC/PPCScheduleG4.td index 03c3b29cc10..87a3151e7c7 100644 --- a/llvm/lib/Target/PowerPC/PPCScheduleG4.td +++ b/llvm/lib/Target/PowerPC/PPCScheduleG4.td @@ -1,10 +1,10 @@ -//===- PPCScheduleG4.td - PPC G4 Scheduling Definitions ----*- tablegen -*-===// -// +//===-- PPCScheduleG4.td - PPC G4 Scheduling Definitions ---*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines the itinerary class data for the G4 (7400) processor. diff --git a/llvm/lib/Target/PowerPC/PPCScheduleG4Plus.td b/llvm/lib/Target/PowerPC/PPCScheduleG4Plus.td index 00cac3c7cab..f76557afc8b 100644 --- a/llvm/lib/Target/PowerPC/PPCScheduleG4Plus.td +++ b/llvm/lib/Target/PowerPC/PPCScheduleG4Plus.td @@ -1,10 +1,10 @@ -//===- PPCScheduleG4Plus.td - PPC G4+ Scheduling Defs. -----*- tablegen -*-===// -// +//===-- PPCScheduleG4Plus.td - PPC G4+ Scheduling Defs. ----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines the itinerary class data for the G4+ (7450) processor. diff --git a/llvm/lib/Target/PowerPC/PPCScheduleG5.td b/llvm/lib/Target/PowerPC/PPCScheduleG5.td index 1671f22b30a..bc0820b1020 100644 --- a/llvm/lib/Target/PowerPC/PPCScheduleG5.td +++ b/llvm/lib/Target/PowerPC/PPCScheduleG5.td @@ -1,10 +1,10 @@ -//===- PPCScheduleG5.td - PPC G5 Scheduling Definitions ----*- tablegen -*-===// -// +//===-- PPCScheduleG5.td - PPC G5 Scheduling Definitions ---*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines the itinerary class data for the G5 (970) processor. diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp index baa0eb550ff..c89fab3356c 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp @@ -1,4 +1,4 @@ -//===- PowerPCSubtarget.cpp - PPC Subtarget Information -------------------===// +//===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h index 62b2424d82c..69fe50baa9b 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.h +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h @@ -1,4 +1,4 @@ -//=====-- PPCSubtarget.h - Define Subtarget for the PPC -------*- C++ -*--====// +//===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h index 4a2fa41958b..6dd11c99fc4 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h @@ -1,4 +1,4 @@ -//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC -----*- C++ -*-=// +//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h index 9335923c2ce..616e1c56151 100644 --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h @@ -1,4 +1,4 @@ -//=====-- SparcMCAsmInfo.h - Sparc asm properties -------------*- C++ -*--====// +//===-- SparcMCAsmInfo.h - Sparc asm properties ----------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp index 56c86abf0f2..7fdb0c39285 100644 --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions --------*- C++ -*-===// +//===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/Sparc.td b/llvm/lib/Target/Sparc/Sparc.td index 764336665d0..611f8e8129f 100644 --- a/llvm/lib/Target/Sparc/Sparc.td +++ b/llvm/lib/Target/Sparc/Sparc.td @@ -1,10 +1,10 @@ -//===- Sparc.td - Describe the Sparc Target Machine --------*- tablegen -*-===// -// +//===-- Sparc.td - Describe the Sparc Target Machine -------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // diff --git a/llvm/lib/Target/Sparc/SparcCallingConv.td b/llvm/lib/Target/Sparc/SparcCallingConv.td index 856f87ad1d3..d4712208126 100644 --- a/llvm/lib/Target/Sparc/SparcCallingConv.td +++ b/llvm/lib/Target/Sparc/SparcCallingConv.td @@ -1,10 +1,10 @@ -//===- SparcCallingConv.td - Calling Conventions Sparc -----*- tablegen -*-===// -// +//===-- SparcCallingConv.td - Calling Conventions Sparc ----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This describes the calling conventions for the Sparc architectures. diff --git a/llvm/lib/Target/Sparc/SparcFrameLowering.cpp b/llvm/lib/Target/Sparc/SparcFrameLowering.cpp index 320c8ca26d7..1c5c89e9715 100644 --- a/llvm/lib/Target/Sparc/SparcFrameLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcFrameLowering.cpp @@ -1,4 +1,4 @@ -//====- SparcFrameLowering.cpp - Sparc Frame Information -------*- C++ -*-====// +//===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/SparcFrameLowering.h b/llvm/lib/Target/Sparc/SparcFrameLowering.h index 9a2ddc83f5a..210705e2d47 100644 --- a/llvm/lib/Target/Sparc/SparcFrameLowering.h +++ b/llvm/lib/Target/Sparc/SparcFrameLowering.h @@ -1,4 +1,4 @@ -//===- SparcFrameLowering.h - Define frame lowering for Sparc --*- C++ -*--===// +//===-- SparcFrameLowering.h - Define frame lowering for Sparc --*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/SparcInstrFormats.td b/llvm/lib/Target/Sparc/SparcInstrFormats.td index 6535259e16f..dce331228b8 100644 --- a/llvm/lib/Target/Sparc/SparcInstrFormats.td +++ b/llvm/lib/Target/Sparc/SparcInstrFormats.td @@ -1,10 +1,10 @@ -//===- SparcInstrFormats.td - Sparc Instruction Formats ----*- tablegen -*-===// -// +//===-- SparcInstrFormats.td - Sparc Instruction Formats ---*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction { diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp index 52266ffe682..faff468a587 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- SparcInstrInfo.cpp - Sparc Instruction Information -------*- C++ -*-===// +//===-- SparcInstrInfo.cpp - Sparc Instruction Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.h b/llvm/lib/Target/Sparc/SparcInstrInfo.h index 4b5d0eb1842..4932531f06a 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.h +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.h @@ -1,4 +1,4 @@ -//===- SparcInstrInfo.h - Sparc Instruction Information ---------*- C++ -*-===// +//===-- SparcInstrInfo.h - Sparc Instruction Information --------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td b/llvm/lib/Target/Sparc/SparcInstrInfo.td index cf5c48fd18d..15541ef2f83 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.td +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td @@ -1,10 +1,10 @@ -//===- SparcInstrInfo.td - Target Description for Sparc Target ------------===// -// +//===-- SparcInstrInfo.td - Target Description for Sparc Target -----------===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the Sparc instructions in TableGen format. diff --git a/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.cpp b/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.cpp index efc37a3f2e9..e7442826e78 100644 --- a/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.cpp @@ -1,4 +1,4 @@ -//==- SparcMachineFunctionInfo.cpp - Sparc Machine Function Info -*- C++ -*-==// +//===-- SparcMachineFunctionInfo.cpp - Sparc Machine Function Info --------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp index 58d0d656a19..0496a8e70b5 100644 --- a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- SparcRegisterInfo.cpp - SPARC Register Information -------*- C++ -*-===// +//===-- SparcRegisterInfo.cpp - SPARC Register Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.h b/llvm/lib/Target/Sparc/SparcRegisterInfo.h index f845667b4d9..a849e6dc73c 100644 --- a/llvm/lib/Target/Sparc/SparcRegisterInfo.h +++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.h @@ -1,4 +1,4 @@ -//===- SparcRegisterInfo.h - Sparc Register Information Impl ----*- C++ -*-===// +//===-- SparcRegisterInfo.h - Sparc Register Information Impl ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.td b/llvm/lib/Target/Sparc/SparcRegisterInfo.td index 7f3c9b47e8c..81bff6c51c9 100644 --- a/llvm/lib/Target/Sparc/SparcRegisterInfo.td +++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.td @@ -1,10 +1,10 @@ -//===- SparcRegisterInfo.td - Sparc Register defs ----------*- tablegen -*-===// -// +//===-- SparcRegisterInfo.td - Sparc Register defs ---------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/Sparc/SparcSubtarget.cpp b/llvm/lib/Target/Sparc/SparcSubtarget.cpp index 7ffd4da3184..e5b2aeb1bb8 100644 --- a/llvm/lib/Target/Sparc/SparcSubtarget.cpp +++ b/llvm/lib/Target/Sparc/SparcSubtarget.cpp @@ -1,4 +1,4 @@ -//===- SparcSubtarget.cpp - SPARC Subtarget Information -------------------===// +//===-- SparcSubtarget.cpp - SPARC Subtarget Information ------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/Sparc/SparcSubtarget.h b/llvm/lib/Target/Sparc/SparcSubtarget.h index 2846447723b..a81931b34aa 100644 --- a/llvm/lib/Target/Sparc/SparcSubtarget.h +++ b/llvm/lib/Target/Sparc/SparcSubtarget.h @@ -1,4 +1,4 @@ -//=====-- SparcSubtarget.h - Define Subtarget for the SPARC ----*- C++ -*-====// +//===-- SparcSubtarget.h - Define Subtarget for the SPARC -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index 37ddf7f555f..08d6c07ae86 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -1,4 +1,4 @@ -//===- X86Disassembler.cpp - Disassembler for x86 and x86_64 ----*- C++ -*-===// +//===-- X86Disassembler.cpp - Disassembler for x86 and x86_64 -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.h b/llvm/lib/Target/X86/Disassembler/X86Disassembler.h index 4a5a8c2a0c0..85e8ab63a3d 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.h +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.h @@ -1,4 +1,4 @@ -//===- X86Disassembler.h - Disassembler for x86 and x86_64 ------*- C++ -*-===// +//===-- X86Disassembler.h - Disassembler for x86 and x86_64 -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c index 72ae8552027..3740f497c19 100644 --- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c +++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c @@ -1,4 +1,4 @@ -/*===- X86DisassemblerDecoder.c - Disassembler decoder -------------*- C -*-==* +/*===-- X86DisassemblerDecoder.c - Disassembler decoder ------------*- C -*-===* * * The LLVM Compiler Infrastructure * diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h index 7e2667614fd..7caee73268d 100644 --- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h +++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h @@ -1,4 +1,4 @@ -/*===- X86DisassemblerDecoderInternal.h - Disassembler decoder -----*- C -*-==* +/*===-- X86DisassemblerDecoderInternal.h - Disassembler decoder ---*- C -*-===* * * The LLVM Compiler Infrastructure * diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h index d6b23c0af4f..b5995c1e68e 100644 --- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h +++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h @@ -1,4 +1,4 @@ -/*===- X86DisassemblerDecoderCommon.h - Disassembler decoder -------*- C -*-==* +/*===-- X86DisassemblerDecoderCommon.h - Disassembler decoder -----*- C -*-===* * * The LLVM Compiler Infrastructure * diff --git a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h b/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h index 0293869b0a9..3d56bb3a9d9 100644 --- a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h +++ b/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h @@ -1,4 +1,4 @@ -//===-- X86ATTInstPrinter.h - Convert X86 MCInst to assembly syntax -------===// +//==- X86ATTInstPrinter.h - Convert X86 MCInst to assembly syntax -*- C++ -*-=// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstComments.h b/llvm/lib/Target/X86/InstPrinter/X86InstComments.h index 6b86db4f9e5..13fdf9af8c9 100644 --- a/llvm/lib/Target/X86/InstPrinter/X86InstComments.h +++ b/llvm/lib/Target/X86/InstPrinter/X86InstComments.h @@ -1,4 +1,4 @@ -//===-- X86InstComments.h - Generate verbose-asm comments for instrs ------===// +//=- X86InstComments.h - Generate verbose-asm comments for instrs -*- C++ -*-=// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h b/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h index 6d5ec6226a9..82839a28eee 100644 --- a/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h +++ b/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h @@ -1,4 +1,4 @@ -//===-- X86IntelInstPrinter.h - Convert X86 MCInst to assembly syntax -----===// +//= X86IntelInstPrinter.h - Convert X86 MCInst to assembly syntax -*- C++ -*-=// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h b/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h index 17d242ab761..f2e34cbe0d6 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h @@ -1,4 +1,4 @@ -//===-- X86/X86FixupKinds.h - X86 Specific Fixup Entries --------*- C++ -*-===// +//===-- X86FixupKinds.h - X86 Specific Fixup Entries ------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h index 57019c7e7ce..b6b70fd3e85 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h @@ -1,4 +1,4 @@ -//=====-- X86MCAsmInfo.h - X86 asm properties -----------------*- C++ -*--====// +//===-- X86MCAsmInfo.h - X86 asm properties --------------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 4af03124bed..2a82744a5ef 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -1,4 +1,4 @@ -//===-- X86/X86MCCodeEmitter.cpp - Convert X86 code to machine code -------===// +//===-- X86MCCodeEmitter.cpp - Convert X86 code to machine code -----------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp index 68259e37504..5ca592d5ead 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- X86MCTargetDesc.cpp - X86 Target Descriptions -----------*- C++ -*-===// +//===-- X86MCTargetDesc.cpp - X86 Target Descriptions ---------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td index 7f2ece79dde..b6591d44196 100644 --- a/llvm/lib/Target/X86/X86.td +++ b/llvm/lib/Target/X86/X86.td @@ -1,4 +1,4 @@ -//===- X86.td - Target definition file for the Intel X86 ---*- tablegen -*-===// +//===-- X86.td - Target definition file for the Intel X86 --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86COFFMachineModuleInfo.cpp b/llvm/lib/Target/X86/X86COFFMachineModuleInfo.cpp index 4326814a7a9..411e4be05d2 100644 --- a/llvm/lib/Target/X86/X86COFFMachineModuleInfo.cpp +++ b/llvm/lib/Target/X86/X86COFFMachineModuleInfo.cpp @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/X86COFFMachineModuleInfo.cpp -------------------------===// +//===-- X86COFFMachineModuleInfo.cpp --------------------------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86COFFMachineModuleInfo.h b/llvm/lib/Target/X86/X86COFFMachineModuleInfo.h index 98ab2a66a17..f7c6dd1fbda 100644 --- a/llvm/lib/Target/X86/X86COFFMachineModuleInfo.h +++ b/llvm/lib/Target/X86/X86COFFMachineModuleInfo.h @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/X86COFFMachineModuleInfo.h -----------------*- C++ -*-===// +//===-- X86COFFMachineModuleInfo.h ------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86CallingConv.td b/llvm/lib/Target/X86/X86CallingConv.td index 1e48deee409..81d3796cc35 100644 --- a/llvm/lib/Target/X86/X86CallingConv.td +++ b/llvm/lib/Target/X86/X86CallingConv.td @@ -1,10 +1,10 @@ -//===- X86CallingConv.td - Calling Conventions X86 32/64 ---*- tablegen -*-===// -// +//===-- X86CallingConv.td - Calling Conventions X86 32/64 --*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This describes the calling conventions for the X86-32 and X86-64 diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp index a802fc2c94e..ee3de9a3f6f 100644 --- a/llvm/lib/Target/X86/X86CodeEmitter.cpp +++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp @@ -1,4 +1,4 @@ -//===-- X86/X86CodeEmitter.cpp - Convert X86 code to machine code ---------===// +//===-- X86CodeEmitter.cpp - Convert X86 code to machine code -------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp index a2e5e35190d..ee266c04ad1 100644 --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -1,4 +1,4 @@ -//=======- X86FrameLowering.cpp - X86 Frame Information --------*- C++ -*-====// +//===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86FrameLowering.h b/llvm/lib/Target/X86/X86FrameLowering.h index 6f490640b4e..d55a49763a4 100644 --- a/llvm/lib/Target/X86/X86FrameLowering.h +++ b/llvm/lib/Target/X86/X86FrameLowering.h @@ -1,4 +1,4 @@ -//=-- X86TargetFrameLowering.h - Define frame lowering for X86 ---*- C++ -*-===// +//===-- X86TargetFrameLowering.h - Define frame lowering for X86 -*- C++ -*-==// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86Instr3DNow.td b/llvm/lib/Target/X86/X86Instr3DNow.td index dd4f6a5a85a..54b91c3edb8 100644 --- a/llvm/lib/Target/X86/X86Instr3DNow.td +++ b/llvm/lib/Target/X86/X86Instr3DNow.td @@ -1,4 +1,4 @@ -//====- X86Instr3DNow.td - The 3DNow! Instruction Set ------*- tablegen -*-===// +//===-- X86Instr3DNow.td - The 3DNow! Instruction Set ------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86InstrArithmetic.td b/llvm/lib/Target/X86/X86InstrArithmetic.td index 7029b7139a5..7fa7499af0f 100644 --- a/llvm/lib/Target/X86/X86InstrArithmetic.td +++ b/llvm/lib/Target/X86/X86InstrArithmetic.td @@ -1,10 +1,10 @@ -//===- X86InstrArithmetic.td - Integer Arithmetic Instrs ---*- tablegen -*-===// -// +//===-- X86InstrArithmetic.td - Integer Arithmetic Instrs --*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the integer arithmetic instructions in the X86 diff --git a/llvm/lib/Target/X86/X86InstrCMovSetCC.td b/llvm/lib/Target/X86/X86InstrCMovSetCC.td index c6d1e146826..adeaf5410dc 100644 --- a/llvm/lib/Target/X86/X86InstrCMovSetCC.td +++ b/llvm/lib/Target/X86/X86InstrCMovSetCC.td @@ -1,10 +1,10 @@ -//===- X86InstrCMovSetCC.td - Conditional Move and SetCC ---*- tablegen -*-===// -// +//===-- X86InstrCMovSetCC.td - Conditional Move and SetCC --*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the X86 conditional move and set on condition diff --git a/llvm/lib/Target/X86/X86InstrControl.td b/llvm/lib/Target/X86/X86InstrControl.td index e17f0497bec..f3938751d77 100644 --- a/llvm/lib/Target/X86/X86InstrControl.td +++ b/llvm/lib/Target/X86/X86InstrControl.td @@ -1,4 +1,4 @@ -//===- X86InstrControl.td - Control Flow Instructions ------*- tablegen -*-===// +//===-- X86InstrControl.td - Control Flow Instructions -----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86InstrExtension.td b/llvm/lib/Target/X86/X86InstrExtension.td index e62e6b701f4..8835d0aaa18 100644 --- a/llvm/lib/Target/X86/X86InstrExtension.td +++ b/llvm/lib/Target/X86/X86InstrExtension.td @@ -1,10 +1,10 @@ -//===- X86InstrExtension.td - Sign and Zero Extensions -----*- tablegen -*-===// -// +//===-- X86InstrExtension.td - Sign and Zero Extensions ----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the sign and zero extension operations. diff --git a/llvm/lib/Target/X86/X86InstrFMA.td b/llvm/lib/Target/X86/X86InstrFMA.td index 32176bbd652..66f5c801eef 100644 --- a/llvm/lib/Target/X86/X86InstrFMA.td +++ b/llvm/lib/Target/X86/X86InstrFMA.td @@ -1,4 +1,4 @@ -//====- X86InstrFMA.td - Describe the X86 Instruction Set --*- tablegen -*-===// +//===-- X86InstrFMA.td - Describe the X86 Instruction Set --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86InstrFPStack.td b/llvm/lib/Target/X86/X86InstrFPStack.td index adfd98b8fb4..3148f9028c9 100644 --- a/llvm/lib/Target/X86/X86InstrFPStack.td +++ b/llvm/lib/Target/X86/X86InstrFPStack.td @@ -1,10 +1,10 @@ //==- X86InstrFPStack.td - Describe the X86 Instruction Set --*- tablegen -*-=// -// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the X86 x87 FPU instruction set, defining the diff --git a/llvm/lib/Target/X86/X86InstrFormats.td b/llvm/lib/Target/X86/X86InstrFormats.td index dc4cb3b3a41..5c0180337be 100644 --- a/llvm/lib/Target/X86/X86InstrFormats.td +++ b/llvm/lib/Target/X86/X86InstrFormats.td @@ -1,10 +1,10 @@ -//===- X86InstrFormats.td - X86 Instruction Formats --------*- tablegen -*-===// -// +//===-- X86InstrFormats.td - X86 Instruction Formats -------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td index 9e727b71631..ab0217dd48a 100644 --- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -1,10 +1,10 @@ -//======- X86InstrFragmentsSIMD.td - x86 ISA -------------*- tablegen -*-=====// +//===-- X86InstrFragmentsSIMD.td - x86 ISA -----------------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file provides pattern fragments useful for SIMD instructions. diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index e14a7dc1524..2ff26b13858 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -1,4 +1,4 @@ -//===- X86InstrInfo.cpp - X86 Instruction Information -----------*- C++ -*-===// +//===-- X86InstrInfo.cpp - X86 Instruction Information --------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h index ee488d8f01d..d065d2da5a2 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.h +++ b/llvm/lib/Target/X86/X86InstrInfo.h @@ -1,4 +1,4 @@ -//===- X86InstrInfo.h - X86 Instruction Information ------------*- C++ -*- ===// +//===-- X86InstrInfo.h - X86 Instruction Information ------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 91dc303328f..e575cea8046 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -1,4 +1,4 @@ -//===- X86InstrInfo.td - Main X86 Instruction Definition ---*- tablegen -*-===// +//===-- X86InstrInfo.td - Main X86 Instruction Definition --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td index 79179e67417..63f96b6f5d3 100644 --- a/llvm/lib/Target/X86/X86InstrMMX.td +++ b/llvm/lib/Target/X86/X86InstrMMX.td @@ -1,4 +1,4 @@ -//====- X86InstrMMX.td - Describe the MMX Instruction Set --*- tablegen -*-===// +//===-- X86InstrMMX.td - Describe the MMX Instruction Set --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 41adc0a323c..058dc7402db 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -1,4 +1,4 @@ -//====- X86InstrSSE.td - Describe the X86 Instruction Set --*- tablegen -*-===// +//===-- X86InstrSSE.td - Describe the X86 Instruction Set --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86InstrSVM.td b/llvm/lib/Target/X86/X86InstrSVM.td index 17ec8ee47ea..757dcd0b5dc 100644 --- a/llvm/lib/Target/X86/X86InstrSVM.td +++ b/llvm/lib/Target/X86/X86InstrSVM.td @@ -1,10 +1,10 @@ -//===- X86InstrSVM.td - SVM Instruction Set Extension ------*- tablegen -*-===// -// +//===-- X86InstrSVM.td - SVM Instruction Set Extension -----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the instructions that make up the AMD SVM instruction diff --git a/llvm/lib/Target/X86/X86InstrShiftRotate.td b/llvm/lib/Target/X86/X86InstrShiftRotate.td index 65dbb32be74..bdeb63ffbd6 100644 --- a/llvm/lib/Target/X86/X86InstrShiftRotate.td +++ b/llvm/lib/Target/X86/X86InstrShiftRotate.td @@ -1,10 +1,10 @@ -//===- X86InstrShiftRotate.td - Shift and Rotate Instrs ----*- tablegen -*-===// -// +//===-- X86InstrShiftRotate.td - Shift and Rotate Instrs ---*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the shift and rotate instructions. diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td index 350daeac8c7..884384851ab 100644 --- a/llvm/lib/Target/X86/X86InstrSystem.td +++ b/llvm/lib/Target/X86/X86InstrSystem.td @@ -1,10 +1,10 @@ -//===- X86InstrSystem.td - System Instructions -------------*- tablegen -*-===// -// +//===-- X86InstrSystem.td - System Instructions ------------*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the X86 instructions that are generally used in diff --git a/llvm/lib/Target/X86/X86InstrVMX.td b/llvm/lib/Target/X86/X86InstrVMX.td index 935b10d510f..a5c6f2060d0 100644 --- a/llvm/lib/Target/X86/X86InstrVMX.td +++ b/llvm/lib/Target/X86/X86InstrVMX.td @@ -1,10 +1,10 @@ -//===- X86InstrVMX.td - VMX Instruction Set Extension ------*- tablegen -*-===// -// +//===-- X86InstrVMX.td - VMX Instruction Set Extension -----*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file describes the instructions that make up the Intel VMX instruction diff --git a/llvm/lib/Target/X86/X86InstrXOP.td b/llvm/lib/Target/X86/X86InstrXOP.td index b806c444132..cfefa5e5ea0 100644 --- a/llvm/lib/Target/X86/X86InstrXOP.td +++ b/llvm/lib/Target/X86/X86InstrXOP.td @@ -1,15 +1,15 @@ -//====- X86InstrXOP.td - Describe the X86 Instruction Set --*- tablegen -*-====// +//===-- X86InstrXOP.td - Describe the X86 Instruction Set --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // -//===-----------------------------------------------------------------------===// +//===----------------------------------------------------------------------===// // // This file describes XOP (eXtended OPerations) // -//===-----------------------------------------------------------------------===// +//===----------------------------------------------------------------------===// multiclass xop2op<bits<8> opc, string OpcodeStr, Intrinsic Int, PatFrag memop> { def rr : IXOP<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), diff --git a/llvm/lib/Target/X86/X86JITInfo.h b/llvm/lib/Target/X86/X86JITInfo.h index 238420c236b..c76d3ccf5d9 100644 --- a/llvm/lib/Target/X86/X86JITInfo.h +++ b/llvm/lib/Target/X86/X86JITInfo.h @@ -1,4 +1,4 @@ -//===- X86JITInfo.h - X86 implementation of the JIT interface --*- C++ -*-===// +//===-- X86JITInfo.h - X86 implementation of the JIT interface --*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86MCInstLower.h b/llvm/lib/Target/X86/X86MCInstLower.h index 02100723912..40df3db7d48 100644 --- a/llvm/lib/Target/X86/X86MCInstLower.h +++ b/llvm/lib/Target/X86/X86MCInstLower.h @@ -1,4 +1,4 @@ -//===-- X86MCInstLower.h - Lower MachineInstr to MCInst -------------------===// +//===-- X86MCInstLower.h - Lower MachineInstr to MCInst ---------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86MachineFunctionInfo.cpp b/llvm/lib/Target/X86/X86MachineFunctionInfo.cpp index de8848931eb..568dc222d9d 100644 --- a/llvm/lib/Target/X86/X86MachineFunctionInfo.cpp +++ b/llvm/lib/Target/X86/X86MachineFunctionInfo.cpp @@ -1,10 +1,10 @@ -//====- X86MachineFuctionInfo.cpp - X86 machine function info ---*- C++ -*-===// -// +//===-- X86MachineFuctionInfo.cpp - X86 machine function info -------------===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// #include "X86MachineFunctionInfo.h" diff --git a/llvm/lib/Target/X86/X86MachineFunctionInfo.h b/llvm/lib/Target/X86/X86MachineFunctionInfo.h index b73f67d14b0..c7471091ec4 100644 --- a/llvm/lib/Target/X86/X86MachineFunctionInfo.h +++ b/llvm/lib/Target/X86/X86MachineFunctionInfo.h @@ -1,10 +1,10 @@ -//====- X86MachineFuctionInfo.h - X86 machine function info -----*- C++ -*-===// -// +//===-- X86MachineFuctionInfo.h - X86 machine function info -----*- C++ -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file declares X86-specific per-machine-function information. diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp index d99a78db513..a59ce21749b 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.cpp +++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===// +//===-- X86RegisterInfo.cpp - X86 Register Information --------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86RegisterInfo.h b/llvm/lib/Target/X86/X86RegisterInfo.h index 71488fb4387..c9c1d973623 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.h +++ b/llvm/lib/Target/X86/X86RegisterInfo.h @@ -1,4 +1,4 @@ -//===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===// +//===-- X86RegisterInfo.h - X86 Register Information Impl -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86Relocations.h b/llvm/lib/Target/X86/X86Relocations.h index 990962dc417..857becff66d 100644 --- a/llvm/lib/Target/X86/X86Relocations.h +++ b/llvm/lib/Target/X86/X86Relocations.h @@ -1,4 +1,4 @@ -//===- X86Relocations.h - X86 Code Relocations ------------------*- C++ -*-===// +//===-- X86Relocations.h - X86 Code Relocations -----------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86Schedule.td b/llvm/lib/Target/X86/X86Schedule.td index 78037c6ad39..39523e63094 100644 --- a/llvm/lib/Target/X86/X86Schedule.td +++ b/llvm/lib/Target/X86/X86Schedule.td @@ -1,4 +1,4 @@ -//===- X86Schedule.td - X86 Scheduling Definitions ---------*- tablegen -*-===// +//===-- X86Schedule.td - X86 Scheduling Definitions --------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86ScheduleAtom.td b/llvm/lib/Target/X86/X86ScheduleAtom.td index a0dbf6dc225..55a91997ff5 100644 --- a/llvm/lib/Target/X86/X86ScheduleAtom.td +++ b/llvm/lib/Target/X86/X86ScheduleAtom.td @@ -1,4 +1,4 @@ -//=- X86ScheduleAtom.td - X86 Atom Scheduling Definitions -*- tablegen -*-=// +//===- X86ScheduleAtom.td - X86 Atom Scheduling Definitions -*- tablegen -*-==// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h index 9e8b3f98d8a..a9299929ca6 100644 --- a/llvm/lib/Target/X86/X86Subtarget.h +++ b/llvm/lib/Target/X86/X86Subtarget.h @@ -1,4 +1,4 @@ -//=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====// +//===---- X86Subtarget.h - Define Subtarget for the X86 --------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86TargetObjectFile.cpp b/llvm/lib/Target/X86/X86TargetObjectFile.cpp index 991f322a634..c0d2a9cf263 100644 --- a/llvm/lib/Target/X86/X86TargetObjectFile.cpp +++ b/llvm/lib/Target/X86/X86TargetObjectFile.cpp @@ -1,4 +1,4 @@ -//===-- llvm/Target/X86/X86TargetObjectFile.cpp - X86 Object Info ---------===// +//===-- X86TargetObjectFile.cpp - X86 Object Info -------------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/X86/X86TargetObjectFile.h b/llvm/lib/Target/X86/X86TargetObjectFile.h index d7adf27ecae..ceb7a4afd87 100644 --- a/llvm/lib/Target/X86/X86TargetObjectFile.h +++ b/llvm/lib/Target/X86/X86TargetObjectFile.h @@ -1,4 +1,4 @@ -//===-- llvm/Target/X86/X86TargetObjectFile.h - X86 Object Info -*- C++ -*-===// +//===-- X86TargetObjectFile.h - X86 Object Info -----------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h index f9e0290bbda..24e170ae575 100644 --- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h +++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h @@ -1,4 +1,4 @@ -//=====-- XCoreMCAsmInfo.h - XCore asm properties -------------*- C++ -*--====// +//===-- XCoreMCAsmInfo.h - XCore asm properties ----------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp index a795dea433e..bbfdd4356f2 100644 --- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp +++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- XCoreMCTargetDesc.cpp - XCore Target Descriptions -------*- C++ -*-===// +//===-- XCoreMCTargetDesc.cpp - XCore Target Descriptions -----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCore.td b/llvm/lib/Target/XCore/XCore.td index 38401895e63..04a1dd5e95b 100644 --- a/llvm/lib/Target/XCore/XCore.td +++ b/llvm/lib/Target/XCore/XCore.td @@ -1,4 +1,4 @@ -//===- XCore.td - Describe the XCore Target Machine --------*- tablegen -*-===// +//===-- XCore.td - Describe the XCore Target Machine -------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // @@ -7,6 +7,7 @@ // //===----------------------------------------------------------------------===// // +// This is the top level entry point for the XCore target. // //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp index 5007d041f60..35c083fdf18 100644 --- a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp @@ -1,4 +1,4 @@ -//===-- XCoreFrameLowering.cpp - Frame info for XCore Target -----*- C++ -*-==// +//===-- XCoreFrameLowering.cpp - Frame info for XCore Target --------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreFrameLowering.h b/llvm/lib/Target/XCore/XCoreFrameLowering.h index c591e93780a..4c51aa5e79c 100644 --- a/llvm/lib/Target/XCore/XCoreFrameLowering.h +++ b/llvm/lib/Target/XCore/XCoreFrameLowering.h @@ -1,4 +1,4 @@ -//===-- XCoreFrameLowering.h - Frame info for XCore Target -------*- C++ -*-==// +//===-- XCoreFrameLowering.h - Frame info for XCore Target ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp index 34e321cf6da..99b1bdd990c 100644 --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -1,4 +1,4 @@ -//===-- XCoreISelLowering.cpp - XCore DAG Lowering Implementation ------===// +//===-- XCoreISelLowering.cpp - XCore DAG Lowering Implementation ---------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreInstrFormats.td b/llvm/lib/Target/XCore/XCoreInstrFormats.td index 8002c993270..1963a70fb30 100644 --- a/llvm/lib/Target/XCore/XCoreInstrFormats.td +++ b/llvm/lib/Target/XCore/XCoreInstrFormats.td @@ -1,4 +1,4 @@ -//===- XCoreInstrFormats.td - XCore Instruction Formats ----*- tablegen -*-===// +//===-- XCoreInstrFormats.td - XCore Instruction Formats ---*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.cpp b/llvm/lib/Target/XCore/XCoreInstrInfo.cpp index a0946a197a1..f9306230ce4 100644 --- a/llvm/lib/Target/XCore/XCoreInstrInfo.cpp +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.cpp @@ -1,4 +1,4 @@ -//===- XCoreInstrInfo.cpp - XCore Instruction Information -------*- C++ -*-===// +//===-- XCoreInstrInfo.cpp - XCore Instruction Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.h b/llvm/lib/Target/XCore/XCoreInstrInfo.h index d354802ee03..e47d2120cfc 100644 --- a/llvm/lib/Target/XCore/XCoreInstrInfo.h +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.h @@ -1,4 +1,4 @@ -//===- XCoreInstrInfo.h - XCore Instruction Information ---------*- C++ -*-===// +//===-- XCoreInstrInfo.h - XCore Instruction Information --------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.td b/llvm/lib/Target/XCore/XCoreInstrInfo.td index 4d2e93bc7a0..b25a08d25c1 100644 --- a/llvm/lib/Target/XCore/XCoreInstrInfo.td +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.td @@ -1,4 +1,4 @@ -//===- XCoreInstrInfo.td - Target Description for XCore ----*- tablegen -*-===// +//===-- XCoreInstrInfo.td - Target Description for XCore ---*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.cpp b/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.cpp index e782bbef399..7ca06729120 100644 --- a/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.cpp +++ b/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.cpp @@ -1,4 +1,4 @@ -//===- XCoreMachineFuctionInfo.cpp - XCore machine function info -*- C++ -*-==// +//===-- XCoreMachineFuctionInfo.cpp - XCore machine function info ---------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h b/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h index d2ef9b72864..f869fcf26de 100644 --- a/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h +++ b/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h @@ -1,4 +1,4 @@ -//====- XCoreMachineFuctionInfo.h - XCore machine function info -*- C++ -*-===// +//===-- XCoreMachineFuctionInfo.h - XCore machine function info -*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp b/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp index 1b78b373fff..1393e256811 100644 --- a/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp +++ b/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- XCoreRegisterInfo.cpp - XCore Register Information -------*- C++ -*-===// +//===-- XCoreRegisterInfo.cpp - XCore Register Information ----------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreRegisterInfo.h b/llvm/lib/Target/XCore/XCoreRegisterInfo.h index 5c28f39d878..f7637341cc6 100644 --- a/llvm/lib/Target/XCore/XCoreRegisterInfo.h +++ b/llvm/lib/Target/XCore/XCoreRegisterInfo.h @@ -1,4 +1,4 @@ -//===- XCoreRegisterInfo.h - XCore Register Information Impl ----*- C++ -*-===// +//===-- XCoreRegisterInfo.h - XCore Register Information Impl ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreRegisterInfo.td b/llvm/lib/Target/XCore/XCoreRegisterInfo.td index c3542304a4e..9edfda1f500 100644 --- a/llvm/lib/Target/XCore/XCoreRegisterInfo.td +++ b/llvm/lib/Target/XCore/XCoreRegisterInfo.td @@ -1,4 +1,4 @@ -//===- XCoreRegisterInfo.td - XCore Register defs ----------*- tablegen -*-===// +//===-- XCoreRegisterInfo.td - XCore Register defs ---------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreSubtarget.cpp b/llvm/lib/Target/XCore/XCoreSubtarget.cpp index 78a14698982..8cfb77089f3 100644 --- a/llvm/lib/Target/XCore/XCoreSubtarget.cpp +++ b/llvm/lib/Target/XCore/XCoreSubtarget.cpp @@ -1,4 +1,4 @@ -//===- XCoreSubtarget.cpp - XCore Subtarget Information -----------*- C++ -*-=// +//===-- XCoreSubtarget.cpp - XCore Subtarget Information ------------------===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreSubtarget.h b/llvm/lib/Target/XCore/XCoreSubtarget.h index 2175e5a7ce8..8d0f254e087 100644 --- a/llvm/lib/Target/XCore/XCoreSubtarget.h +++ b/llvm/lib/Target/XCore/XCoreSubtarget.h @@ -1,4 +1,4 @@ -//=====-- XCoreSubtarget.h - Define Subtarget for the XCore -----*- C++ -*--==// +//===-- XCoreSubtarget.h - Define Subtarget for the XCore -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // diff --git a/llvm/lib/Target/XCore/XCoreTargetObjectFile.h b/llvm/lib/Target/XCore/XCoreTargetObjectFile.h index 7424c78be30..27875e783b3 100644 --- a/llvm/lib/Target/XCore/XCoreTargetObjectFile.h +++ b/llvm/lib/Target/XCore/XCoreTargetObjectFile.h @@ -1,4 +1,4 @@ -//===-- llvm/Target/XCoreTargetObjectFile.h - XCore Object Info -*- C++ -*-===// +//===-- XCoreTargetObjectFile.h - XCore Object Info -------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // |
