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| author | Jim Grosbach <grosbach@apple.com> | 2011-12-08 20:56:26 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-12-08 20:56:26 +0000 |
| commit | ab9c8bb45b7c53e7333028c9bb7df1de38899ffb (patch) | |
| tree | 812106201206f4bac240ded509a21cdfd83defa9 /llvm | |
| parent | 27a33edfa08955abbec6d141459333147515c9c9 (diff) | |
| download | bcm5719-llvm-ab9c8bb45b7c53e7333028c9bb7df1de38899ffb.tar.gz bcm5719-llvm-ab9c8bb45b7c53e7333028c9bb7df1de38899ffb.zip | |
ARM VSUB implied destination operand form aliases.
llvm-svn: 146182
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrNEON.td | 24 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/neon-sub-encoding.s | 25 |
2 files changed, 48 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrNEON.td b/llvm/lib/Target/ARM/ARMInstrNEON.td index 271afe681da..abe61a9af9f 100644 --- a/llvm/lib/Target/ARM/ARMInstrNEON.td +++ b/llvm/lib/Target/ARM/ARMInstrNEON.td @@ -5321,6 +5321,30 @@ def : NEONInstAlias<"vadd${p}.f32 $Vdn, $Vm", def : NEONInstAlias<"vadd${p}.f32 $Vdn, $Vm", (VADDfq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>; +// VSUB two-operand aliases. +def : NEONInstAlias<"vsub${p}.i8 $Vdn, $Vm", + (VSUBv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>; +def : NEONInstAlias<"vsub${p}.i16 $Vdn, $Vm", + (VSUBv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>; +def : NEONInstAlias<"vsub${p}.i32 $Vdn, $Vm", + (VSUBv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>; +def : NEONInstAlias<"vsub${p}.i64 $Vdn, $Vm", + (VSUBv2i64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>; + +def : NEONInstAlias<"vsub${p}.i8 $Vdn, $Vm", + (VSUBv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>; +def : NEONInstAlias<"vsub${p}.i16 $Vdn, $Vm", + (VSUBv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>; +def : NEONInstAlias<"vsub${p}.i32 $Vdn, $Vm", + (VSUBv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>; +def : NEONInstAlias<"vsub${p}.i64 $Vdn, $Vm", + (VSUBv1i64 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>; + +def : NEONInstAlias<"vsub${p}.f32 $Vdn, $Vm", + (VSUBfd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>; +def : NEONInstAlias<"vsub${p}.f32 $Vdn, $Vm", + (VSUBfq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>; + // VADDW two-operand aliases. def : NEONInstAlias<"vaddw${p}.s8 $Vdn, $Vm", (VADDWsv8i16 QPR:$Vdn, QPR:$Vdn, DPR:$Vm, pred:$p)>; diff --git a/llvm/test/MC/ARM/neon-sub-encoding.s b/llvm/test/MC/ARM/neon-sub-encoding.s index 8f679db1ac2..0622e192bc6 100644 --- a/llvm/test/MC/ARM/neon-sub-encoding.s +++ b/llvm/test/MC/ARM/neon-sub-encoding.s @@ -11,6 +11,17 @@ vsub.i64 q8, q8, q9 vsub.f32 q8, q8, q9 + vsub.i8 d13, d21 + vsub.i16 d14, d22 + vsub.i32 d15, d23 + vsub.i64 d16, d24 + vsub.f32 d17, d25 + vsub.i8 q1, q10 + vsub.i16 q2, q9 + vsub.i32 q3, q8 + vsub.i64 q4, q7 + vsub.f32 q5, q6 + @ CHECK: vsub.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf3] @ CHECK: vsub.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xf3] @ CHECK: vsub.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xf3] @@ -21,9 +32,21 @@ @ CHECK: vsub.i32 q8, q8, q9 @ encoding: [0xe2,0x08,0x60,0xf3] @ CHECK: vsub.i64 q8, q8, q9 @ encoding: [0xe2,0x08,0x70,0xf3] @ CHECK: vsub.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x60,0xf2] -@ CHECK: vsubl.s8 q8, d17, d16 @ encoding: [0xa0,0x02,0xc1,0xf2] + +@ CHECK: vsub.i8 d13, d13, d21 @ encoding: [0x25,0xd8,0x0d,0xf3] +@ CHECK: vsub.i16 d14, d14, d22 @ encoding: [0x26,0xe8,0x1e,0xf3] +@ CHECK: vsub.i32 d15, d15, d23 @ encoding: [0x27,0xf8,0x2f,0xf3] +@ CHECK: vsub.i64 d16, d16, d24 @ encoding: [0xa8,0x08,0x70,0xf3] +@ CHECK: vsub.f32 d17, d17, d25 @ encoding: [0xa9,0x1d,0x61,0xf2] +@ CHECK: vsub.i8 q1, q1, q10 @ encoding: [0x64,0x28,0x02,0xf3] +@ CHECK: vsub.i16 q2, q2, q9 @ encoding: [0x62,0x48,0x14,0xf3] +@ CHECK: vsub.i32 q3, q3, q8 @ encoding: [0x60,0x68,0x26,0xf3] +@ CHECK: vsub.i64 q4, q4, q7 @ encoding: [0x4e,0x88,0x38,0xf3] +@ CHECK: vsub.f32 q5, q5, q6 @ encoding: [0x4c,0xad,0x2a,0xf2] + +@ CHECK: vsubl.s8 q8, d17, d16 @ encoding: [0xa0,0x02,0xc1,0xf2] vsubl.s8 q8, d17, d16 @ CHECK: vsubl.s16 q8, d17, d16 @ encoding: [0xa0,0x02,0xd1,0xf2] vsubl.s16 q8, d17, d16 |
