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| author | Owen Anderson <resistor@mac.com> | 2012-05-07 20:51:25 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2012-05-07 20:51:25 +0000 |
| commit | ab63d84252c6fb85416ddabb040573fe598b39db (patch) | |
| tree | 1315b6f5ab271e9d7c73a589a76f80c9fabe1562 /llvm | |
| parent | f4f80e1f39a2da2de2623eb9d176b77bdbcac009 (diff) | |
| download | bcm5719-llvm-ab63d84252c6fb85416ddabb040573fe598b39db.tar.gz bcm5719-llvm-ab63d84252c6fb85416ddabb040573fe598b39db.zip | |
Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled.
llvm-svn: 156324
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/unsafe-fsub.ll | 18 |
2 files changed, 22 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index c2b7f6c513a..753ba937c06 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -5670,9 +5670,13 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) { GetNegatedExpression(N1, DAG, LegalOperations)); // If 'unsafe math' is enabled, fold + // (fsub x, x) -> 0.0 & // (fsub x, (fadd x, y)) -> (fneg y) & // (fsub x, (fadd y, x)) -> (fneg y) if (DAG.getTarget().Options.UnsafeFPMath) { + if (N0 == N1) + return DAG.getConstantFP(0.0f, VT); + if (N1.getOpcode() == ISD::FADD) { SDValue N10 = N1->getOperand(0); SDValue N11 = N1->getOperand(1); diff --git a/llvm/test/CodeGen/ARM/unsafe-fsub.ll b/llvm/test/CodeGen/ARM/unsafe-fsub.ll new file mode 100644 index 00000000000..3a4477d3156 --- /dev/null +++ b/llvm/test/CodeGen/ARM/unsafe-fsub.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=arm -mcpu=cortex-a9 < %s | FileCheck -check-prefix=SAFE %s +; RUN: llc -march=arm -mcpu=cortex-a9 -enable-unsafe-fp-math < %s | FileCheck -check-prefix=FAST %s + +target triple = "armv7-apple-ios" + +; SAFE: test +; FAST: test +define float @test(float %x, float %y) { +entry: +; SAFE: vmul.f32 +; SAFE: vsub.f32 +; FAST: mov r0, #0 + %0 = fmul float %x, %y + %1 = fsub float %0, %0 + ret float %1 +} + + |
