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authorSjoerd Meijer <sjoerd.meijer@arm.com>2016-07-08 12:54:43 +0000
committerSjoerd Meijer <sjoerd.meijer@arm.com>2016-07-08 12:54:43 +0000
commita625af3febeb12fe14bac61993df81471bfcfb0f (patch)
treee5c7c317c4586b7105640f7529198627b1961318 /llvm
parent586e579fe8ffda388207a34bc99fc8fc5a2d26fe (diff)
downloadbcm5719-llvm-a625af3febeb12fe14bac61993df81471bfcfb0f.tar.gz
bcm5719-llvm-a625af3febeb12fe14bac61993df81471bfcfb0f.zip
Code size optimisation: don't expand a div to a mul and and a shift sequence.
As a result, the urem instruction will not be expanded to a sequence of umull, lsrs, muls and sub instructions, but just a call to __aeabi_uidivmod. Differential Revision: http://reviews.llvm.org/D22131 llvm-svn: 274843
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp5
-rw-r--r--llvm/test/CodeGen/ARM/urem-opt-size.ll25
2 files changed, 30 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index dc2ff6eb918..456c5498e3c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -14516,6 +14516,11 @@ SDValue DAGCombiner::BuildSDIVPow2(SDNode *N) {
/// number.
/// Ref: "Hacker's Delight" or "The PowerPC Compiler Writer's Guide".
SDValue DAGCombiner::BuildUDIV(SDNode *N) {
+ // when optimising for size, we don't want to expand a div to a mul and
+ // and a shift.
+ if (ForCodeSize)
+ return SDValue();
+
ConstantSDNode *C = isConstOrConstSplat(N->getOperand(1));
if (!C)
return SDValue();
diff --git a/llvm/test/CodeGen/ARM/urem-opt-size.ll b/llvm/test/CodeGen/ARM/urem-opt-size.ll
new file mode 100644
index 00000000000..4490a47093e
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/urem-opt-size.ll
@@ -0,0 +1,25 @@
+; When optimising for size, we don't want to expand a div to a mul and
+; and a shift sequence. As a result, the urem instruction will not be
+; expanded to a sequence of umull, lsrs, muls and sub instructions, but
+; just a call to __aeabi_uidivmod.
+;
+; RUN: llc -mtriple=armv7a-eabi -mattr=-neon -verify-machineinstrs %s -o - | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "thumbv7m-arm-none-eabi"
+
+define i32 @foo() local_unnamed_addr #0 {
+entry:
+; CHECK-LABEL: foo:
+; CHECK: __aeabi_uidivmod
+; CHECK-NOT: umull
+ %call = tail call i32 bitcast (i32 (...)* @GetValue to i32 ()*)()
+ %rem = urem i32 %call, 1000000
+ %cmp = icmp eq i32 %rem, 0
+ %conv = zext i1 %cmp to i32
+ ret i32 %conv
+}
+
+declare i32 @GetValue(...) local_unnamed_addr
+
+attributes #0 = { minsize nounwind optsize }
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