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| author | Tim Northover <tnorthover@apple.com> | 2014-11-27 21:29:20 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-11-27 21:29:20 +0000 |
| commit | a38e5cbf20693b84e2ea184b54c6dfdfe0992318 (patch) | |
| tree | aa4af38eb2e0ebb2ad5ad843ed8c44ef1aa00d19 /llvm | |
| parent | b047bfae32123f6a5f72c79cd30659c5347b92d2 (diff) | |
| download | bcm5719-llvm-a38e5cbf20693b84e2ea184b54c6dfdfe0992318.tar.gz bcm5719-llvm-a38e5cbf20693b84e2ea184b54c6dfdfe0992318.zip | |
Stop using ArrayRef of a const type.
I *think* this is what the GCC bots are complaining about.
llvm-svn: 222905
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/include/llvm/CodeGen/CallingConvLower.h | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64CallingConvention.h | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMCallingConv.h | 2 |
3 files changed, 3 insertions, 4 deletions
diff --git a/llvm/include/llvm/CodeGen/CallingConvLower.h b/llvm/include/llvm/CodeGen/CallingConvLower.h index 903a3954960..7a979dbcef8 100644 --- a/llvm/include/llvm/CodeGen/CallingConvLower.h +++ b/llvm/include/llvm/CodeGen/CallingConvLower.h @@ -345,8 +345,7 @@ public: /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive /// registers. If this is not possible, return zero. Otherwise, return the first /// register of the block that were allocated, marking the entire block as allocated. - unsigned AllocateRegBlock(ArrayRef<const uint16_t> Regs, - unsigned RegsRequired) { + unsigned AllocateRegBlock(ArrayRef<uint16_t> Regs, unsigned RegsRequired) { if (RegsRequired > Regs.size()) return 0; diff --git a/llvm/lib/Target/AArch64/AArch64CallingConvention.h b/llvm/lib/Target/AArch64/AArch64CallingConvention.h index b2be99e5419..6355164ac57 100644 --- a/llvm/lib/Target/AArch64/AArch64CallingConvention.h +++ b/llvm/lib/Target/AArch64/AArch64CallingConvention.h @@ -85,7 +85,7 @@ static bool CC_AArch64_Custom_Block(unsigned &ValNo, MVT &ValVT, MVT &LocVT, ISD::ArgFlagsTy &ArgFlags, CCState &State) { // Try to allocate a contiguous block of registers, each of the correct // size to hold one member. - ArrayRef<const uint16_t> RegList; + ArrayRef<uint16_t> RegList; if (LocVT.SimpleTy == MVT::i64) RegList = XRegList; else if (LocVT.SimpleTy == MVT::f32) diff --git a/llvm/lib/Target/ARM/ARMCallingConv.h b/llvm/lib/Target/ARM/ARMCallingConv.h index 4567a2a1afd..e0d0559ba98 100644 --- a/llvm/lib/Target/ARM/ARMCallingConv.h +++ b/llvm/lib/Target/ARM/ARMCallingConv.h @@ -194,7 +194,7 @@ static bool CC_ARM_AAPCS_Custom_HA(unsigned &ValNo, MVT &ValVT, MVT &LocVT, // Try to allocate a contiguous block of registers, each of the correct // size to hold one member. - ArrayRef<const uint16_t> RegList; + ArrayRef<uint16_t> RegList; switch (LocVT.SimpleTy) { case MVT::f32: RegList = SRegList; |

