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| author | Chris Lattner <sabre@nondot.org> | 2004-05-09 23:16:33 +0000 | 
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-05-09 23:16:33 +0000 | 
| commit | a367dd745b011f9eb0196bd01cfeba25b31254be (patch) | |
| tree | 8d366cd892932cdf2ece448e49437f4081b5b86e /llvm | |
| parent | 1542a98e7b3d58c47a82dd22a4693d8d104df1f1 (diff) | |
| download | bcm5719-llvm-a367dd745b011f9eb0196bd01cfeba25b31254be.tar.gz bcm5719-llvm-a367dd745b011f9eb0196bd01cfeba25b31254be.zip  | |
Fix some comments, avoid sign extending booleans when zero extend works fine
llvm-svn: 13440
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/InstSelectSimple.cpp | 10 | 
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/InstSelectSimple.cpp b/llvm/lib/Target/X86/InstSelectSimple.cpp index 62002e7dc74..38503886de0 100644 --- a/llvm/lib/Target/X86/InstSelectSimple.cpp +++ b/llvm/lib/Target/X86/InstSelectSimple.cpp @@ -886,9 +886,9 @@ unsigned ISel::EmitComparison(unsigned OpNum, Value *Op0, Value *Op1,          // each, then uses a conditional move to handle the overflow case.  For          // example, a setlt for long would generate code like this:          // -        // AL = lo(op1) < lo(op2)   // Signedness depends on operands -        // BL = hi(op1) < hi(op2)   // Always unsigned comparison -        // dest = hi(op1) == hi(op2) ? AL : BL; +        // AL = lo(op1) < lo(op2)   // Always unsigned comparison +        // BL = hi(op1) < hi(op2)   // Signedness depends on operands +        // dest = hi(op1) == hi(op2) ? BL : AL;          //          // FIXME: This would be much better if we had hierarchical register @@ -960,7 +960,7 @@ unsigned ISel::EmitComparison(unsigned OpNum, Value *Op0, Value *Op1,        //        // AL = lo(op1) < lo(op2)   // Signedness depends on operands        // BL = hi(op1) < hi(op2)   // Always unsigned comparison -      // dest = hi(op1) == hi(op2) ? AL : BL; +      // dest = hi(op1) == hi(op2) ? BL : AL;        //        // FIXME: This would be much better if we had hierarchical register @@ -1193,7 +1193,7 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,  /// operand, in the specified target register.  ///  void ISel::promote32(unsigned targetReg, const ValueRecord &VR) { -  bool isUnsigned = VR.Ty->isUnsigned(); +  bool isUnsigned = VR.Ty->isUnsigned() || VR.Ty == Type::BoolTy;    Value *Val = VR.Val;    const Type *Ty = VR.Ty;  | 

