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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-02-27 13:26:58 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-02-27 13:26:58 +0000 |
| commit | 9e10b1655cc783175fb4daeef26a13ed6d8a219e (patch) | |
| tree | 884451a4a350a65e3caff4b4b1e7cd9ce041a8f3 /llvm | |
| parent | b1be8f6928948a5868567f494a50456d8127dbe9 (diff) | |
| download | bcm5719-llvm-9e10b1655cc783175fb4daeef26a13ed6d8a219e.tar.gz bcm5719-llvm-9e10b1655cc783175fb4daeef26a13ed6d8a219e.zip | |
Tidyup for loops - don't repeat upper limit evaluation if you don't have to. NFCI.
llvm-svn: 262137
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e87074b17e5..65d0318610c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -2210,7 +2210,7 @@ X86TargetLowering::LowerReturn(SDValue Chain, MVT::i16)); // Copy the result values into the output registers. - for (unsigned i = 0; i != RVLocs.size(); ++i) { + for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); SDValue ValToCopy = OutVals[i]; @@ -6075,7 +6075,7 @@ X86TargetLowering::LowerBUILD_VECTORvXi1(SDValue Op, SelectionDAG &DAG) const { DAG.getIntPtrConstant(0, dl)); } - for (unsigned i = 0; i < NonConstIdx.size(); ++i) { + for (unsigned i = 0, e = NonConstIdx.size(); i != e; ++i) { unsigned InsertIdx = NonConstIdx[i]; DstVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DstVec, Op.getOperand(InsertIdx), @@ -26367,6 +26367,7 @@ static SDValue VectorZextCombine(SDNode *N, SelectionDAG &DAG, return SDValue(); unsigned SrcSize = SrcType.getScalarSizeInBits(); + unsigned NumElems = SrcType.getVectorNumElements(); APInt SplatValue, SplatUndef; unsigned SplatBitSize; @@ -26390,7 +26391,7 @@ static SDValue VectorZextCombine(SDNode *N, SelectionDAG &DAG, // the source and dest type. unsigned ZextRatio = ResSize / SrcSize; bool IsZext = true; - for (unsigned i = 0; i < SrcType.getVectorNumElements(); ++i) { + for (unsigned i = 0; i != NumElems; ++i) { if (i % ZextRatio) { if (Shuffle->getMaskElt(i) > 0) { // Expected undef @@ -26413,8 +26414,7 @@ static SDValue VectorZextCombine(SDNode *N, SelectionDAG &DAG, // a shuffle of the form <0, k, k, k, 1, k, k, k> with zero // (instead of undef) where the k elements come from the zero vector. SmallVector<int, 8> Mask; - unsigned NumElems = SrcType.getVectorNumElements(); - for (unsigned i = 0; i < NumElems; ++i) + for (unsigned i = 0; i != NumElems; ++i) if (i % ZextRatio) Mask.push_back(NumElems); else |
