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| author | Amara Emerson <aemerson@apple.com> | 2018-04-18 17:10:19 +0000 |
|---|---|---|
| committer | Amara Emerson <aemerson@apple.com> | 2018-04-18 17:10:19 +0000 |
| commit | 9de072f8ae8ee9075fb4ec7422b936a76ffa474e (patch) | |
| tree | d23c4122c2b2c73a6b2be0d68841f9ddfa4aa44e /llvm | |
| parent | 1a928f3fc7e41375d92dcb2955e818842dee880b (diff) | |
| download | bcm5719-llvm-9de072f8ae8ee9075fb4ec7422b936a76ffa474e.tar.gz bcm5719-llvm-9de072f8ae8ee9075fb4ec7422b936a76ffa474e.zip | |
[AArch64] Add isel pattern for v8i8->v2f32 NVCASTs.
rdar://39454635
llvm-svn: 330276
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrInfo.td | 1 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-nvcast.ll | 16 |
2 files changed, 17 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index de0b9f20cac..8eba86aa1b9 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -5651,6 +5651,7 @@ def : Pat<(v8i8 (AArch64NvCast (v8i8 FPR64:$src))), (v8i8 FPR64:$src)>; def : Pat<(v4i16 (AArch64NvCast (v8i8 FPR64:$src))), (v4i16 FPR64:$src)>; def : Pat<(v4f16 (AArch64NvCast (v8i8 FPR64:$src))), (v4f16 FPR64:$src)>; def : Pat<(v2i32 (AArch64NvCast (v8i8 FPR64:$src))), (v2i32 FPR64:$src)>; +def : Pat<(v2f32 (AArch64NvCast (v8i8 FPR64:$src))), (v2f32 FPR64:$src)>; def : Pat<(v1i64 (AArch64NvCast (v8i8 FPR64:$src))), (v1i64 FPR64:$src)>; def : Pat<(v8i8 (AArch64NvCast (f64 FPR64:$src))), (v8i8 FPR64:$src)>; diff --git a/llvm/test/CodeGen/AArch64/arm64-nvcast.ll b/llvm/test/CodeGen/AArch64/arm64-nvcast.ll index ba2512718c4..d9486127bf1 100644 --- a/llvm/test/CodeGen/AArch64/arm64-nvcast.ll +++ b/llvm/test/CodeGen/AArch64/arm64-nvcast.ll @@ -31,3 +31,19 @@ entry: store float %v2, float* %p1, align 4 ret void } + + +%"st1" = type { %"subst1", %"subst1", %"subst1" } +%"subst1" = type { %float4 } +%float4 = type { float, float, float, float } + +@_gv = external unnamed_addr global %"st1", align 8 + +define internal void @nvcast_f32_v8i8() { +; CHECK-LABEL: _nvcast_f32_v8i8 +; CHECK: movi.8b v[[REG:[0-9]+]], #254 +; CHECK: str d[[REG]] +entry: + store <2 x float> <float 0xC7DFDFDFC0000000, float 0xC7DFDFDFC0000000>, <2 x float>* bitcast (%"st1"* @_gv to <2 x float>*), align 8 + ret void +} |
