diff options
| author | Daniel Cederman <cederman@gaisler.com> | 2017-03-08 15:23:10 +0000 |
|---|---|---|
| committer | Daniel Cederman <cederman@gaisler.com> | 2017-03-08 15:23:10 +0000 |
| commit | 9db582a65623ad8035a4e71bcc543b43ec4c2b92 (patch) | |
| tree | e24eb63323f340723dd537efe5b15184b6c041b7 /llvm | |
| parent | ac170872b2d15b373d8905472edae22e48582417 (diff) | |
| download | bcm5719-llvm-9db582a65623ad8035a4e71bcc543b43ec4c2b92.tar.gz bcm5719-llvm-9db582a65623ad8035a4e71bcc543b43ec4c2b92.zip | |
[Sparc] Check register use with isPhysRegUsed() instead of reg_nodbg_empty()
Summary: By using reg_nodbg_empty() to determine if a function can be
treated as a leaf function or not, we miss the case when the register
pair L0_L1 is used but not L0 by itself. This has the effect that
use_all_i32_regs(), a test in reserved-regs.ll which tries to use all
registers, gets treated as a leaf function.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: davide, RKSimon, sepavloff, llvm-commits
Differential Revision: https://reviews.llvm.org/D27089
llvm-svn: 297285
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcFrameLowering.cpp | 11 | ||||
| -rw-r--r-- | llvm/test/CodeGen/SPARC/reserved-regs.ll | 4 |
2 files changed, 8 insertions, 7 deletions
diff --git a/llvm/lib/Target/Sparc/SparcFrameLowering.cpp b/llvm/lib/Target/Sparc/SparcFrameLowering.cpp index 122f830e0dc..c07cc213c3e 100644 --- a/llvm/lib/Target/Sparc/SparcFrameLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcFrameLowering.cpp @@ -288,11 +288,11 @@ static bool LLVM_ATTRIBUTE_UNUSED verifyLeafProcRegUse(MachineRegisterInfo *MRI) { for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) - if (!MRI->reg_nodbg_empty(reg)) + if (MRI->isPhysRegUsed(reg)) return false; for (unsigned reg = SP::L0; reg <= SP::L7; ++reg) - if (!MRI->reg_nodbg_empty(reg)) + if (MRI->isPhysRegUsed(reg)) return false; return true; @@ -305,8 +305,8 @@ bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const MachineFrameInfo &MFI = MF.getFrameInfo(); return !(MFI.hasCalls() // has calls - || !MRI.reg_nodbg_empty(SP::L0) // Too many registers needed - || !MRI.reg_nodbg_empty(SP::O6) // %SP is used + || MRI.isPhysRegUsed(SP::L0) // Too many registers needed + || MRI.isPhysRegUsed(SP::O6) // %SP is used || hasFP(MF)); // need %FP } @@ -314,11 +314,10 @@ void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const { MachineRegisterInfo &MRI = MF.getRegInfo(); // Remap %i[0-7] to %o[0-7]. for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { - if (MRI.reg_nodbg_empty(reg)) + if (!MRI.isPhysRegUsed(reg)) continue; unsigned mapped_reg = reg - SP::I0 + SP::O0; - assert(MRI.reg_nodbg_empty(mapped_reg)); // Replace I register with O register. MRI.replaceRegWith(reg, mapped_reg); diff --git a/llvm/test/CodeGen/SPARC/reserved-regs.ll b/llvm/test/CodeGen/SPARC/reserved-regs.ll index fe208015827..c5a124f538f 100644 --- a/llvm/test/CodeGen/SPARC/reserved-regs.ll +++ b/llvm/test/CodeGen/SPARC/reserved-regs.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=sparc < %s | FileCheck %s +; RUN: llc -march=sparc -verify-machineinstrs < %s | FileCheck %s @g = common global [32 x i32] zeroinitializer, align 16 @h = common global [16 x i64] zeroinitializer, align 16 @@ -6,6 +6,7 @@ ;; Ensures that we don't use registers which are supposed to be reserved. ; CHECK-LABEL: use_all_i32_regs: +; CHECK: save %sp ; CHECK-NOT: %g0 ; CHECK-NOT: %g1 ; CHECK-NOT: %g5 @@ -86,6 +87,7 @@ entry: ; CHECK-LABEL: use_all_i64_regs: +; CHECK: save %sp ; CHECK-NOT: %g0 ; CHECK-NOT: %g1 ; CHECK-NOT: %g4 |

