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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-07-23 18:30:17 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-07-23 18:30:17 +0000 |
commit | 9500a24fce02fdbe30f7b22334edded76ee7feb4 (patch) | |
tree | b16f906d18f9dc6cc3a5a198ad13ae80b4014775 /llvm | |
parent | 3f659e8731464984760493b1011576256ff0f494 (diff) | |
download | bcm5719-llvm-9500a24fce02fdbe30f7b22334edded76ee7feb4.tar.gz bcm5719-llvm-9500a24fce02fdbe30f7b22334edded76ee7feb4.zip |
[Hexagon] Handle unnamed globals in HexagonConstExpr
Instead of comparing names, compare positions in the parent module.
llvm-svn: 337723
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 18 | ||||
-rw-r--r-- | llvm/test/CodeGen/Hexagon/cext-unnamed-global.mir | 38 |
2 files changed, 53 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp index 8b024fad4f8..cbce61bc63c 100644 --- a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp +++ b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp @@ -730,9 +730,21 @@ bool HCE::ExtRoot::operator< (const HCE::ExtRoot &ER) const { } case MachineOperand::MO_ExternalSymbol: return StringRef(V.SymbolName) < StringRef(ER.V.SymbolName); - case MachineOperand::MO_GlobalAddress: - assert(V.GV->hasName() && ER.V.GV->hasName()); - return V.GV->getName() < ER.V.GV->getName(); + case MachineOperand::MO_GlobalAddress: { + // Global values may not have names, so compare their positions + // in the parent module. + const Module &M = *V.GV->getParent(); + auto FindPos = [&M] (const GlobalValue &V) { + unsigned P = 0; + for (const GlobalValue &T : M.global_values()) { + if (&T == &V) + return P; + P++; + } + llvm_unreachable("Global value not found in module"); + }; + return FindPos(*V.GV) < FindPos(*ER.V.GV); + } case MachineOperand::MO_BlockAddress: { const BasicBlock *ThisB = V.BA->getBasicBlock(); const BasicBlock *OtherB = ER.V.BA->getBasicBlock(); diff --git a/llvm/test/CodeGen/Hexagon/cext-unnamed-global.mir b/llvm/test/CodeGen/Hexagon/cext-unnamed-global.mir new file mode 100644 index 00000000000..22cb2e42f4c --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/cext-unnamed-global.mir @@ -0,0 +1,38 @@ +# RUN: llc -march=hexagon -run-pass=hexagon-cext-opt %s -o - | FileCheck %s + +# Check that this test doesn't crash. +# CHECK: %0:intregs = A2_tfrsi @0 + +--- | + target triple = "hexagon" + + @0 = external global [0 x i8] + @1 = external constant [2 x i64] + + define void @f0() #0 { + b0: + tail call fastcc void @f1(float* inttoptr (i64 add (i64 ptrtoint ([0 x i8]* @0 to i64), i64 128) to float*), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @1, i32 0, i32 0)) + ret void + } + + declare fastcc void @f1(float* nocapture readonly, i64* nocapture readonly) #1 + + attributes #0 = { alwaysinline nounwind "target-cpu"="hexagonv60" } + attributes #1 = { noinline norecurse nounwind "target-cpu"="hexagonv60" } +... + +--- +name: f0 +tracksRegLiveness: true +body: | + bb.0: + %0:intregs = A2_tfrsi @0 + %1:intregs = A2_tfrsi 0 + %2:doubleregs = REG_SEQUENCE %0, %subreg.isub_lo, %1, %subreg.isub_hi + %3:doubleregs = CONST64 128 + %4:doubleregs = A2_addp %2, %3 + %5:intregs = A2_tfrsi @1 + $r0 = COPY %4.isub_lo + $r1 = COPY %5 + PS_tailcall_i @f1, hexagoncsr, implicit $r0, implicit $r1 +... |