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| author | Bill Wendling <isanbard@gmail.com> | 2010-11-13 11:20:05 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-11-13 11:20:05 +0000 |
| commit | 9430eb489c3be1f8966a0a8743411bd4597d536e (patch) | |
| tree | 305a7f1b4d747fb5e70d882f082181bf91605b84 /llvm | |
| parent | 705ec77ab598237bb631cc0b498b5860502d1816 (diff) | |
| download | bcm5719-llvm-9430eb489c3be1f8966a0a8743411bd4597d536e.tar.gz bcm5719-llvm-9430eb489c3be1f8966a0a8743411bd4597d536e.zip | |
Comment out the defms until they're activated.
llvm-svn: 119000
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb2.td | 4 |
3 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 52bd9cb5d40..f163c1b1bbb 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1803,7 +1803,8 @@ multiclass arm_ldst_mult<string asm, bit L_bit, Format f, } } -let neverHasSideEffects = 1, isCodeGenOnly = 1 in { +/* TODO: +let neverHasSideEffects = 1 in { let mayLoad = 1, hasExtraDefRegAllocReq = 1 in defm LDM : arm_ldst_mult<"ldm", 1, LdStMulFrm, IIC_iLoad_m, IIC_iLoad_mu>; @@ -1812,6 +1813,7 @@ let mayStore = 1, hasExtraSrcRegAllocReq = 1 in defm STM : arm_ldst_mult<"stm", 0, LdStMulFrm, IIC_iStore_m, IIC_iStore_mu>; } // neverHasSideEffects +*/ let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in { diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td index 4064ced1fc0..2d387bb3949 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb.td @@ -549,7 +549,7 @@ multiclass thumb_ldst_mult<string asm, InstrItinClass itin, T1Encoding<T1Enc>; } -/* FIXME: Uncommented, this causes a decoding conflict. +/* TODO: Uncommented, this causes a decoding conflict. let neverHasSideEffects = 1 in { let mayLoad = 1, hasExtraDefRegAllocReq = 1 in diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index e850d3fb902..62229c33b6d 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -1347,7 +1347,8 @@ multiclass thumb2_ldst_mult<string asm, InstrItinClass itin, } } -let neverHasSideEffects = 1, isCodeGenOnly = 1 in { +/* TODO: +let neverHasSideEffects = 1 in { let mayLoad = 1, hasExtraDefRegAllocReq = 1 in defm t2LDM : thumb2_ldst_mult<"ldm", IIC_iLoad_m, IIC_iLoad_mu, 1>; @@ -1356,6 +1357,7 @@ let mayStore = 1, hasExtraSrcRegAllocReq = 1 in defm t2STM : thumb2_ldst_mult<"stm", IIC_iStore_m, IIC_iStore_mu, 0>; } // neverHasSideEffects +*/ let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in { |
