implement MULHU/MULHS for 64-bit multiplies

llvm-svn: 24797

1 files changed, 11 insertions, 0 deletions

diff --git a/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
index 0e9210dcfed..5d60a1bf5e2 100644
--- a/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
@@ -278,6 +278,17 @@ SDOperand SparcV8DAGToDAGISel::Select(SDOperand Op) {
   
   switch (N->getOpcode()) {
   default: break;
+  case ISD::MULHU:
+  case ISD::MULHS: {
+    SDOperand MulLHS = Select(N->getOperand(0));
+    SDOperand MulRHS = Select(N->getOperand(1));
+    unsigned Opcode = N->getOpcode() == ISD::MULHU ? V8::UMULrr : V8::SMULrr;
+    SDOperand Mul = CurDAG->getTargetNode(Opcode, MVT::i32, MVT::Flag,
+                                          MulLHS, MulRHS);
+    // The high part is in the Y register.
+    return CurDAG->SelectNodeTo(N, V8::RDY, MVT::i32, Mul.getValue(1));
+  }
+    
   case ISD::RET: {
     if (N->getNumOperands() == 2) {
       SDOperand Chain = Select(N->getOperand(0));     // Token chain.