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| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-12-19 11:55:03 +0000 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-12-19 11:55:03 +0000 |
| commit | 8d5e974076fe1c051292cb9787b8b9238fa2d0df (patch) | |
| tree | 6e09e1b5e255ac47b0b9e716030708f55599c9c9 /llvm | |
| parent | 342d03e71fbc302cf5a1683dcd03c366bf96d4bb (diff) | |
| download | bcm5719-llvm-8d5e974076fe1c051292cb9787b8b9238fa2d0df.tar.gz bcm5719-llvm-8d5e974076fe1c051292cb9787b8b9238fa2d0df.zip | |
AMDGPU: Use an ABS32_LO relocation for SCRATCH_RSRC_DWORD1
Summary:
Using HI here makes no logical sense, since the dword is only
32 bits to begin with.
Current Mesa master does not look at the relocation type at all,
so this change is fine. Future Mesa will rely on this, however.
Change-Id: I91085707834c4ac0370926602b93c94b90e44cb1
Reviewers: arsenm, rampitec, mareko
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D55369
llvm-svn: 349620
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 4 |
2 files changed, 6 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp index 07bef9103c0..c85a1ea5b05 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp @@ -46,11 +46,9 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx, if (const auto *SymA = Target.getSymA()) { // SCRATCH_RSRC_DWORD[01] is a special global variable that represents // the scratch buffer. - if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD0") + if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD0" || + SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD1") return ELF::R_AMDGPU_ABS32_LO; - - if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD1") - return ELF::R_AMDGPU_ABS32_HI; } switch (Target.getAccessVariant()) { diff --git a/llvm/test/CodeGen/AMDGPU/scratch-simple.ll b/llvm/test/CodeGen/AMDGPU/scratch-simple.ll index b2781a77811..0ddd7b907b1 100644 --- a/llvm/test/CodeGen/AMDGPU/scratch-simple.ll +++ b/llvm/test/CodeGen/AMDGPU/scratch-simple.ll @@ -1,6 +1,10 @@ ; RUN: llc -march=amdgcn -mtriple=amdgcn-- -mcpu=verde -verify-machineinstrs < %s | FileCheck --check-prefix=GCN --check-prefix=SI %s ; RUN: llc -march=amdgcn -mtriple=amdgcn-- -mcpu=gfx803 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefix=GCN --check-prefix=SI %s ; RUN: llc -march=amdgcn -mtriple=amdgcn-- -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefix=GCN --check-prefix=GFX9 %s +; RUN: llc -march=amdgcn -mtriple=amdgcn-- -mcpu=gfx900 -filetype=obj < %s | llvm-readobj -relocations | FileCheck --check-prefix=RELS %s + +; RELS: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0 +; RELS: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD1 0x0 ; This used to fail due to a v_add_i32 instruction with an illegal immediate ; operand that was created during Local Stack Slot Allocation. Test case derived |
