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authorJames Molloy <james.molloy@arm.com>2016-08-19 08:38:50 +0000
committerJames Molloy <james.molloy@arm.com>2016-08-19 08:38:50 +0000
commit7ee640f9b67e3269f19bbe166bbba6a93c0ee148 (patch)
tree2c685d2803a7a7030ac3be420c5e3d06488a7530 /llvm
parentb81960a6c858b4d40d64798cac3e56ca8e6383fa (diff)
downloadbcm5719-llvm-7ee640f9b67e3269f19bbe166bbba6a93c0ee148.tar.gz
bcm5719-llvm-7ee640f9b67e3269f19bbe166bbba6a93c0ee148.zip
[CodeGen] Fix a trivial type conversion bug dating back to pre-2008
The heuristic above this code is incredibly suspect, but disregarding that it mutates the cast opcode so we need to check the *mutated* opcode later to see if we need to emit an AssertSext or AssertZext node. Fixes PR29041. llvm-svn: 279223
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp2
-rw-r--r--llvm/test/CodeGen/AArch64/fptouint-i8-zext.ll15
2 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 4d776f522af..a4ab37e7f8e 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -427,7 +427,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_FP_TO_XINT(SDNode *N) {
// Assert that the converted value fits in the original type. If it doesn't
// (eg: because the value being converted is too big), then the result of the
// original operation was undefined anyway, so the assert is still correct.
- return DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT ?
+ return DAG.getNode(NewOpc == ISD::FP_TO_UINT ?
ISD::AssertZext : ISD::AssertSext, dl, NVT, Res,
DAG.getValueType(N->getValueType(0).getScalarType()));
}
diff --git a/llvm/test/CodeGen/AArch64/fptouint-i8-zext.ll b/llvm/test/CodeGen/AArch64/fptouint-i8-zext.ll
new file mode 100644
index 00000000000..682683751a8
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/fptouint-i8-zext.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64"
+
+; CHECK-LABEL: float_char_int_func:
+; CHECK: fcvtzs [[A:w[0-9]+]], s0
+; CHECK-NEXT: and w0, [[A]], #0xff
+; CHECK-NEXT: ret
+define i32 @float_char_int_func(float %infloatVal) {
+entry:
+ %conv = fptoui float %infloatVal to i8
+ %conv1 = zext i8 %conv to i32
+ ret i32 %conv1
+}
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