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authorAkira Hatanaka <ahatanaka@mips.com>2013-10-28 21:21:36 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-10-28 21:21:36 +0000
commit7d82252d4b544eb646c99ad41c1da72d0d90d07b (patch)
treecde2fbf4e3fa23fb8737f5687e204b6604ae29d8 /llvm
parent940ca0badae3216df225f5cc758f97e34ef58102 (diff)
downloadbcm5719-llvm-7d82252d4b544eb646c99ad41c1da72d0d90d07b.tar.gz
bcm5719-llvm-7d82252d4b544eb646c99ad41c1da72d0d90d07b.zip
[mips] Simplify LowerFormalArguments using getRegClassFor.
No functionality change. llvm-svn: 193540
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/Mips/MipsISelLowering.cpp17
1 files changed, 2 insertions, 15 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 031ac718dbe..7a0e666ecfe 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -2598,22 +2598,9 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
// Arguments stored on registers
if (IsRegLoc) {
- EVT RegVT = VA.getLocVT();
+ MVT RegVT = VA.getLocVT();
unsigned ArgReg = VA.getLocReg();
- const TargetRegisterClass *RC;
-
- if (RegVT == MVT::i32)
- RC = Subtarget->inMips16Mode()? &Mips::CPU16RegsRegClass :
- &Mips::GPR32RegClass;
- else if (RegVT == MVT::i64)
- RC = &Mips::GPR64RegClass;
- else if (RegVT == MVT::f32)
- RC = &Mips::FGR32RegClass;
- else if (RegVT == MVT::f64)
- RC = Subtarget->isFP64bit() ? &Mips::FGR64RegClass :
- &Mips::AFGR64RegClass;
- else
- llvm_unreachable("RegVT not supported by FormalArguments Lowering");
+ const TargetRegisterClass *RC = getRegClassFor(RegVT);
// Transform the arguments stored on
// physical registers into virtual ones
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