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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2017-09-07 14:52:26 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2017-09-07 14:52:26 +0000 |
| commit | 6ef976d5e1f47c606df19a08a232146ed7ce4c20 (patch) | |
| tree | 8ce5683d11ea4158a53c98b71549e6d64ab26ea1 /llvm | |
| parent | ceeb8b91e7512e01f47289cc981dc5b386edbc06 (diff) | |
| download | bcm5719-llvm-6ef976d5e1f47c606df19a08a232146ed7ce4c20.tar.gz bcm5719-llvm-6ef976d5e1f47c606df19a08a232146ed7ce4c20.zip | |
[ARM] Remove redundant vcvt patterns.
These don't add any value as they're just compositions of existing
patterns. However, they can confuse the cost logic in ISel, leading to
duplicated vcvt instructions like in PR33199.
llvm-svn: 312724
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrVFP.td | 14 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/vcvt.ll | 19 |
2 files changed, 19 insertions, 14 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrVFP.td b/llvm/lib/Target/ARM/ARMInstrVFP.td index b583f995772..873fe5e6e0f 100644 --- a/llvm/lib/Target/ARM/ARMInstrVFP.td +++ b/llvm/lib/Target/ARM/ARMInstrVFP.td @@ -1435,9 +1435,6 @@ def VTOSIZD : AVConv1IsD_Encode<0b11101, 0b11, 0b1101, 0b1011, let Predicates=[HasVFP2, HasDPVFP] in { def : VFPPat<(i32 (fp_to_sint (f64 DPR:$a))), (COPY_TO_REGCLASS (VTOSIZD DPR:$a), GPR)>; - - def : VFPPat<(alignedstore32 (i32 (fp_to_sint (f64 DPR:$a))), addrmode5:$ptr), - (VSTRS (VTOSIZD DPR:$a), addrmode5:$ptr)>; } def VTOSIZS : AVConv1InsS_Encode<0b11101, 0b11, 0b1101, 0b1010, @@ -1455,10 +1452,6 @@ def VTOSIZS : AVConv1InsS_Encode<0b11101, 0b11, 0b1101, 0b1010, def : VFPNoNEONPat<(i32 (fp_to_sint SPR:$a)), (COPY_TO_REGCLASS (VTOSIZS SPR:$a), GPR)>; -def : VFPNoNEONPat<(alignedstore32 (i32 (fp_to_sint (f32 SPR:$a))), - addrmode5:$ptr), - (VSTRS (VTOSIZS SPR:$a), addrmode5:$ptr)>; - def VTOSIZH : AVConv1IsH_Encode<0b11101, 0b11, 0b1101, 0b1001, (outs SPR:$Sd), (ins SPR:$Sm), IIC_fpCVTHI, "vcvt", ".s32.f16\t$Sd, $Sm", @@ -1478,9 +1471,6 @@ def VTOUIZD : AVConv1IsD_Encode<0b11101, 0b11, 0b1100, 0b1011, let Predicates=[HasVFP2, HasDPVFP] in { def : VFPPat<(i32 (fp_to_uint (f64 DPR:$a))), (COPY_TO_REGCLASS (VTOUIZD DPR:$a), GPR)>; - - def : VFPPat<(alignedstore32 (i32 (fp_to_uint (f64 DPR:$a))), addrmode5:$ptr), - (VSTRS (VTOUIZD DPR:$a), addrmode5:$ptr)>; } def VTOUIZS : AVConv1InsS_Encode<0b11101, 0b11, 0b1100, 0b1010, @@ -1498,10 +1488,6 @@ def VTOUIZS : AVConv1InsS_Encode<0b11101, 0b11, 0b1100, 0b1010, def : VFPNoNEONPat<(i32 (fp_to_uint SPR:$a)), (COPY_TO_REGCLASS (VTOUIZS SPR:$a), GPR)>; -def : VFPNoNEONPat<(alignedstore32 (i32 (fp_to_uint (f32 SPR:$a))), - addrmode5:$ptr), - (VSTRS (VTOUIZS SPR:$a), addrmode5:$ptr)>; - def VTOUIZH : AVConv1IsH_Encode<0b11101, 0b11, 0b1100, 0b1001, (outs SPR:$Sd), (ins SPR:$Sm), IIC_fpCVTHI, "vcvt", ".u32.f16\t$Sd, $Sm", diff --git a/llvm/test/CodeGen/ARM/vcvt.ll b/llvm/test/CodeGen/ARM/vcvt.ll index 78105f7e0ad..0d7dc542bae 100644 --- a/llvm/test/CodeGen/ARM/vcvt.ll +++ b/llvm/test/CodeGen/ARM/vcvt.ll @@ -197,3 +197,22 @@ define <2 x i64> @fix_double_to_i64(<2 x double> %in) { ret <2 x i64> %conv } +define i32 @multi_sint(double %c, i32* nocapture %p, i32* nocapture %q) { + %conv = fptosi double %c to i32 + store i32 %conv, i32* %p, align 4 + store i32 %conv, i32* %q, align 4 + ret i32 %conv +; CHECK-LABEL: multi_sint: +; CHECK: vcvt.s32.f64 +; CHECK-NOT: vcvt +} + +define i32 @multi_uint(double %c, i32* nocapture %p, i32* nocapture %q) { + %conv = fptoui double %c to i32 + store i32 %conv, i32* %p, align 4 + store i32 %conv, i32* %q, align 4 + ret i32 %conv +; CHECK-LABEL: multi_uint: +; CHECK: vcvt.u32.f64 +; CHECK-NOT: vcvt +} |
