diff options
| author | Tim Northover <tnorthover@apple.com> | 2017-12-20 10:45:39 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2017-12-20 10:45:39 +0000 |
| commit | 6db5d027c649666e3b1ce02db914d6152833830d (patch) | |
| tree | d961de6f4600f5cacd3ea59ed3bdc78f5c4abb05 /llvm | |
| parent | fffa8229e36771a97682cb85db7d536c2076ad68 (diff) | |
| download | bcm5719-llvm-6db5d027c649666e3b1ce02db914d6152833830d.tar.gz bcm5719-llvm-6db5d027c649666e3b1ce02db914d6152833830d.zip | |
AArch64: fix one more place movi.2d could be created.
Somehow got missed out of r320965.
llvm-svn: 321162
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 14 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll | 9 |
2 files changed, 23 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp index 67138f41dda..2ff2ee347f5 100644 --- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp +++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp @@ -583,6 +583,20 @@ void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) { switch (MI->getOpcode()) { default: break; + case AArch64::MOVIv2d_ns: + // If the target has <rdar://problem/16473581>, lower this + // instruction to movi.16b instead. + if (STI->hasZeroCycleZeroingFPWorkaround() && + MI->getOperand(1).getImm() == 0) { + MCInst TmpInst; + TmpInst.setOpcode(AArch64::MOVIv16b_ns); + TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); + TmpInst.addOperand(MCOperand::createImm(MI->getOperand(1).getImm())); + EmitToStreamer(*OutStreamer, TmpInst); + return; + } + break; + case AArch64::DBG_VALUE: { if (isVerbose() && OutStreamer->hasRawTextSupport()) { SmallString<128> TmpStr; diff --git a/llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll b/llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll index 453334dce60..2fb9d3b2d03 100644 --- a/llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll +++ b/llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll @@ -87,4 +87,13 @@ for.end: ret double %v0 } +define <2 x i64> @t6() { +; ALL-LABEL: t6: +; CYCLONE: movi.16b v0, #0 +; KRYO: movi v0.2d, #0000000000000000 +; FALKOR: movi v0.2d, #0000000000000000 + ret <2 x i64> zeroinitializer +} + + declare double @sin(double) |

